down.vhd

一个关于4路CAN卡的硬件程序,用VHDL编写

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity down is
port(
ada              : inout    std_logic_vector(7 downto 0);
p2a              : in       std_logic_vector(7 downto 0);
wra,rda,alea     : in       std_logic;
adb              : inout    std_logic_vector(7 downto 0);
p2b              : in       std_logic_vector(7 downto 0);
wrb,rdb,aleb     : in       std_logic;
iora             : inout    std_logic_vector(7 downto 0);
ara              : out      std_logic_vector(13 downto 0);
iorb             : inout    std_logic_vector(7 downto 0);
arb              : out      std_logic_vector(13 downto 0);
oera,rwra,cera   : out      std_logic;
oerb,rwrb,cerb   : out      std_logic);
end down;

architecture body_down of down is
signal addressa, addressb  : std_logic_vector(7 downto 0);
signal cs_adown, cs_aup, cs_bdown, cs_bup : std_logic;
signal adatain, adataout, bdatain, bdataout   :  std_logic_vector(7 downto 0);
begin
process(p2a)
begin
    cs_adown<='1';
    cs_aup<='1';
    cs_bdown<='1';
    cs_bup<='1';
    case p2a(7 downto 5) is
	    when "001" => cs_aup<='0';                 --A片上行段地址0x2000-0x3fff(单片机地址空间）
		when "010" => cs_adown<='0';               --A片下行段地址0x4000-0x5fff（单片机地址空间）
		when others => null;
	end case;
    case p2b(7 downto 5) is
	    when "001" => cs_bup<='0';                 --b片上行段地址0x2000-0x3fff（单片机地址空间）
		when "010" => cs_bdown<='0';               --b片下行段地址0x4000-0x5fff（单片机地址空间）
		when others => null;
	end case;
end process;

process(alea)                                             --单片机在双口RAM中8K空间内寻址
begin
    if alea'event and alea='0' then
        addressa<=ada;
    end if;
	ara(12 downto 0)<=p2a(4 downto 0)&addressa(7 downto 0);
end process;
process(cs_aup)
begin
    if cs_aup='0' then 
	    ara(13)<='0';                              --上行段地址0x0000-0x1fff(双口RAM地址）
	end if;
	if cs_adown='0' then
	    ara(13)<='1';                              --下行段地址0x2000-0x3fff（双口RAM地址）
	end if;
	cera<=cs_aup and cs_adown;                     --片选信号产生
	oera<='0';                                    --输出允许永远为‘0’；
    if rda='0' then 
	    rwra<='1';                                --单片机读数据时RW信号置‘1’； 
	else 
	    rwra<=wra;                                --单片机写数据时RW信号即为WR信号
	end if;
end process;

process(aleb)
begin
    if aleb'event and aleb='0' then
        addressb<=adb;
    end if;
	arb(12 downto 0)<=p2b(4 downto 0)&addressb(7 downto 0);
end process;

process(cs_bup)
begin
    if cs_bup='0' then 
	    arb(13)<='0';
	end if;
	if cs_bdown='0' then
	    arb(13)<='1';
	end if;
	cerb<=cs_bup and cs_bdown;
	oerb<='0';
    if rdb='0' then 
	    rwrb<='1';
	else 
	    rwrb<=wrb;
	end if;
end process;  

process(rda)
begin
    if (cs_aup='0' or cs_adown='0') and rda='0' then
	    adatain<=iora;
	else 
	    adatain<=(others=>'Z');
	end if;
	ada<=adatain;
end process;
process(wra)
begin
    if (cs_aup='0' or cs_adown='0') and wra='0' then
        adataout<=ada;
    else
	    adataout<=(others=>'Z');
	end if;
	iora<=adataout;
end process;

process(rdb)
begin
    if (cs_bup='0' or cs_bdown='0') and rdb='0' then
	    bdatain<=iorb;
	else 
	    bdatain<=(others=>'Z');
	end if;
	adb<=bdatain;
end process;
process(wrb)
begin
    if (cs_bup='0' or cs_bdown='0') and wrb='0' then
        bdataout<=adb;
    else
	    bdataout<=(others=>'Z');
	end if;
	iorb<=bdataout;
end process;


end body_down;