c68.txt

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                                  normally  results  from  this  option.
                                  However if  it goes wrong, the results
                                  can be rather unpredictable.

                        Default:  -peep=all

              -pointer=16|32
                        Specifies that  the code  should be generated to
                        conform to  the small  memory model  (64K data +
                        64K code segments) which uses 16 bit pointers or
                        the large model which uses 32 bit pointers.

                        Default:  -pointer=16


              If support  for multiple  processors and/or assemblers was
              configured when  the compiler  was  built,  then  you  can
              specify the  target to  be a 8086 processor and a specific
              assembler can be specified using the following options:

              -bas86    Generate 8086  code.  Use  the syntax  for Bruce
                        Evan's 16 bit 8086 assembler for the output.

              -gas86    Generate  8086  code.   Use  the  GNU  assembler
                        syntax for the output.

              -masm86   Generate 8086  code.   Use  the  Microsoft  MASM
                        assembler syntax for the output

              -sysv86   Generate 8086 code.  Use the Unix SVR4 assembler
                        syntax for the output.



         TEXAS INSTRUMENTS TMSC30 PROCESSOR OPTIONS

              The options  listed in this section will only be available
              if support  for the Texas Instruments TMSC30 DSP processor
              was specified at the time the compiler was built.

              NOTE The TMSC30 support was developed by and is maintained
                   by:
                                            Ivo Oesch,
                        Selzweg 1,
                        3422 Kirchberg,
                        Switzerland.
                   email: [e-mail] (valid until March 1997)


              -collect=yes|no
                        This option is  used to  control  the  level  of
                        effort  that  is  put  into  removing  redundant
                        moves.  The 'yes' value implies try harder.

                        N.B. This option is  likely  to  be  removed  or
                             combined with  some  other  option  in  the
                             future.

              -delayed=n
                        This controls the  condition under which delayed
                        branches are  used.  The values of 'n' should be
                        in the  range 0  to  3.   The  meaning  oif  the
                        different vales is as follows:

                         0   No delayed branches are used

                         1   At least one useful instruction must follow
                             to be  able to  use a  delayed  branch,  or
                             alternatively up  to to  2 nops are allowed
                             to be  added to  be able  to use  a delayed
                             branch.

                         2   At least two useful instruction must follow
                             to be  able to  use a  delayed  branch,  or
                             alternatively not more than 1 nop.

                         3   All three   instructions    following   the
                             delayed branch must be useful to be able to
                             use a delayed branch.

                        The implementation of  this option  is  done  by
                        taking 'useful'  instructions  from  before  the
                        branch (i.e.  the branch  instruction  is  moved
                        backwards in  the generated  instruction stream,
                        and  if  this  is  not  sufficient  also  moving
                        instructions  from   the  branches   target  and
                        adjusting the target location accordingly.

              -forcedsave=none|option_list|all
                        Forces the compiler  to save specified registers
                        on function  entry and restore them when leaving
                        a  function.    The  'option_list'  may  be  any
                        combination of the following register names:

                        none      No registers are saved.

                        all       All registers

                        You can specify  specific registers by using any
                        combination of the following (comma separated):

                        r0,r1,r2,r3,r4,r5,r6,r7
                        ar0,ar1,ar2,ar3,ar4,ar5,ar6,ar7
                        dp,ir0,ir1,bk,sp,st,ie,if,iof,rs,re,rc

                        In addition you  can  use  rn  to  mean  all  r?
                        registers and arn to mean all ar? registers.

                        It usually will  only makes  sense to  use  this
                        option for special interrupt routines, so should
                        not be switched on via the comand line.

                        The most likely way you would use this option is
                        by including the following type of code sequence
                        in your source:
                             #pragma forcedsave=all
                                                      special
                        Interruptroutine
                                                      #pragma
                        forcedsave=none

                                                 (This option was sdded
                        since I needed it to get a  realtime-operating
                        system running, and it was needed for
                        context-switching - I had to force a save of all
                        registers onto the stack before switching the
                        context (Reload SP and FRAMEPTR))


              -mul32=yes|no
                        If enabled then  real 32-bit  multiplication  is
                        used  for   longs.   If  not  enabled  then  the
                        TMS320C30 24-bit multiplciation instructions are
                        used for  longs (and  also any  shorter integral
                        type).

              -optbranch=node|low|medium|hard
                        Control the  effort that  the peephole optimiser
                        puts into  optimising branch  isntructions.  The
                        values have the following effects:

                        none      No branch optimisation is done
                        low       Only moving  of  blocks  or  replacing
                                  conditional  jumps   over  loads  with
                                  conditional loads.

                        medium    In addition to  the above, if the code
                                  before a  branch  instruction  is  the
                                  same as  that before the target of the
                                  branch, then move the branch backwards
                                  and try  to  eliminate  any  resulting
                                  redundant code.

                        hard      In addtion  to   the  above,  try  and
                                  common up  any  instruction  sequences
                                  leading up  to a  branch to  the  same
                                  location.

              -parallel=none|normal|all
                        *** DJW *** Not  sure what  this does  but it is
                        present in the code.

              -peep=none|peepopt_list|all
                        Control the  level of peephole optimisation that
                        should be  done. Past  experience has shown that
                        some of  the more  obscure bugs  reported on the
                        compiler are  those where the peephole optimiser
                        part  of   the  compiler  has  made  an  invalid
                        optimisation.   You  would  therefore  use  this
                        option if  you suspect  that  the  compiler  has
                        generated incorrect  code, and  you want to look
                        at what would be generated if some or all of the
                        the peephole optimisation was not done.

                        The meanings of the options are:

                        none      All peephole     optimisations     are
                                  suppressed.

                        all       All peephole     optimisations     are
                                  performed.

                        You can also exercise  a finer  level of control
                        by specifying  the exact combination of peephole
                        optimisations that  you want  from the following
                        options:

                        flow      Used to enable the data flow analyzer.
                                  The  data   flow  analyser  will  walk
                                  through  the  generated  code  keeping
                                  track of  registers and  attempting to
                                  replace  each   data  access   with  a
                                  cheaper operation if possible.

                                  CAUTION:  This optimisation could lead
                                  you to  violate a  volatile constraint
                                  that you  tried  to  apply  at  the  C
                                  level.  A  work-around  is  to  add  a
                                  dummy 'asm'  statement' something like
                                  asm("*Dummy, stops dataflow analyzer")
                                  before any  statement  which  accesses
                                  operandas  with  volatile  qualifiers.
                                  This stops the dataflow analyzer being
                                  able to  do any  replacements at  this
                                  point.

                                  Using    this     option    can    add
                                  significantly to  the compile  time  -
                                  typically about a sixth.

                        pipeline  This is  used   to   control   whether
                                  optimizations  should   be  done  that
                                  attempt to minimise pipeline conflicts
                                  arising  from  the  usage  of  address
                                  registers as  operands in instructions
                                  and  in   address   generation.    The
                                  optimisation involves re-ordering code
                                  sequences where possible to avoid such
                                  conflicts.

                        3operand  Converts  wherever   it  is   possible
                                  two operand  instructions  into  three
                                  operand instructions.  This  may  open
                                  new  paths  for  the  other  optimiser
                                  stages.

                        parallel  Controls    whether    the    peephole
                                  optimiser  should   attempt   to   use
                                  instructions that  can be  executed in
                                  parallel where  possible.  It involves
                                  replacing specific  instructions  with
                                  their parallel equivalents.  Currently
                                  only ldi||ldi,  ldi||sti and  sti||sti
                                  combinations are supported.

                        remap     Controls remapping  of registers.  For
                                  example an
                                       ldi  rx,ry
                                  is removed if  ry can be replaced with
                                  rx in  the following code or if rx can
                                  be replaced  by ry  in the  preceeding
                                  code sequence.

                                  This o