📄 genc30.h
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op_calllt, /* like callu, but contitionally */ op_callle, /* like callu, but contitionally */ op_callgt, /* like callu, but contitionally */ op_callge, /* like callu, but contitionally */ op_callz, /* like callu, but contitionally */ op_callnz, /* like callu, but contitionally */ op_callp, /* like callu, but contitionally */ op_calln, /* like callu, but contitionally */ op_callnn, /* like callu, but contitionally */#endif op_trapu, /* trap unconditional (vectorized call, interupts disabled */#ifdef USE_ALL_OPCODES op_traplo, /* like trapu, but conditionally */ op_trapls, /* like trapu, but conditionally */ op_traphi, /* like trapu, but conditionally */ op_traphs, /* like trapu, but conditionally */ op_trapeq, /* like trapu, but conditionally */ op_trapne, /* like trapu, but conditionally */ op_traplt, /* like trapu, but conditionally */ op_traple, /* like trapu, but conditionally */ op_trapgt, /* like trapu, but conditionally */ op_trapge, /* like trapu, but conditionally */ op_trapz, /* like trapu, but conditionally */ op_trapnz, /* like trapu, but conditionally */ op_trapp, /* like trapu, but conditionally */ op_trapn, /* like trapu, but conditionally */ op_trapnn, /* like trapu, but conditionally */#endif op_retiu, /* return from interrupt */#ifdef USE_ALL_OPCODES op_retilo, /* return from interrupt conditionally */ op_retils, /* return from interrupt conditionally */ op_retihi, /* return from interrupt conditionally */ op_retihs, /* return from interrupt conditionally */ op_retieq, /* return from interrupt conditionally */ op_retine, /* return from interrupt conditionally */ op_retilt, /* return from interrupt conditionally */ op_retile, /* return from interrupt conditionally */ op_retigt, /* return from interrupt conditionally */ op_retige, /* return from interrupt conditionally */ op_retiz, /* return from interrupt conditionally */ op_retinz, /* return from interrupt conditionally */ op_retip, /* return from interrupt conditionally */ op_retin, /* return from interrupt conditionally */ op_retinn, /* return from interrupt conditionally */#endif op_retsu, /* return from subroutine */#ifdef USE_ALL_OPCODES op_retslo, /* return from subroutine conditionally */ op_retsls, /* return from subroutine conditionally */ op_retshi, /* return from subroutine conditionally */ op_retshs, /* return from subroutine conditionally */ op_retseq, /* return from subroutine conditionally */ op_retsne, /* return from subroutine conditionally */ op_retslt, /* return from subroutine conditionally */ op_retsle, /* return from subroutine conditionally */ op_retsgt, /* return from subroutine conditionally */ op_retsge, /* return from subroutine conditionally */ op_retsz, /* return from subroutine conditionally */ op_retsnz, /* return from subroutine conditionally */ op_retsp, /* return from subroutine conditionally */ op_retsn, /* return from subroutine conditionally */ op_retsnn, /* return from subroutine conditionally */ op_mpyf3_addf3, /* mpyf3 and addf3 parallel, (simultaneously) */ op_mpyf3_subf3, /* mpyf3 and subf3 parallel, (simultaneously) */ op_mpyi3_addi3, /* mpyi3 and addi3 parallel, (simultaneously) */ op_mpyi3_subi3, /* mpyi3 and subi3 parallel, (simultaneously) */#endif op_stf_stf, /* two stf parallel, (simultaneously) */ op_sti_sti, /* two sti parallel, (simultaneously) */ op_ldf_ldf, /* two ldf parallel, (simultaneously) */ op_ldi_ldi, /* two ldi parallel, (simultaneously) */ op_absf_stf, /* absf and stf parallel, (simultaneously) */ op_absi_sti, /* absi and sti parallel, (simultaneously) */ op_addf3_stf, /* addf3 and stf parallel, (simultaneously) */ op_addi3_sti, /* addi3 and sti parallel, (simultaneously) */ op_and3_sti, /* and3 and sti parallel, (simultaneously) */ op_ash3_sti, /* ash3 and sti parallel, (simultaneously) */ op_fix_sti, /* fix and sti parallel, (simultaneously) */ op_float_stf, /* float and stf parallel, (simultaneously) */ op_ldf_stf, /* ldf and stf parallel, (simultaneously) */ op_ldi_sti, /* ldi and sti parallel, (simultaneously) */ op_lsh3_sti, /* lsh3 and sti parallel, (simultaneously) */ op_mpyf3_stf, /* mpyf3 and stf parallel, (simultaneously) */ op_mpyi3_sti, /* mpyi3 and sti parallel, (simultaneously) */ op_negf_stf, /* negf and stf parallel, (simultaneously) */ op_negi_sti, /* negi and sti parallel, (simultaneously) */ op_not_sti, /* not and sti parallel, (simultaneously) */ op_or3_sti, /* or3 and sti parallel, (simultaneously) */ op_subf3_stf, /* subf3 and stf parallel, (simultaneously) */ op_subi3_sti, /* subi3 and sti parallel, (simultaneously) */ op_xor3_sti, /* xor3 and sti parallel, (simultaneously) */ op_divs, /* pseudo opcodes */ op_divu, /* pseudo opcodes */ op_line,#ifdef ASM op_asm,#endif /* ASM */ op_label, op_abort /* pseudo opcode for peep as marker in list */};#define OP_MIN op_absf#define OP_MAX op_abort#ifdef USE_ALL_OPCODES#define OP_PARALLEL_FIRST op_mpyf3_addf3#else#define OP_PARALLEL_FIRST op_stf_stf#endif#define OP_PARALLEL_LAST op_xor3_sti/* addressing modes */enum e_am{ am_dreg, /* Rn */ am_areg, /* ARn */ am_ireg, /* IRn */ am_freg, /* Rn float */ am_sreg, /* specialregs DP, BK, SP, RS, RE, RC */ am_ind, /* *ARn */ am_const_ind, /* *ARn, compilerconstant, can never be accessed * by pointer or be written to by user */ am_ainc, /* *ARn++ */ am_adec, /* *ARn-- */ am_preinc, /* *++ARn */ am_predec, /* *--ARn */ am_indx, /* *+ARn(d8) */ am_indx2, /* *+ARn(IRn) */ am_indxs, /* *-ARn(IRn) */ am_direct, /* @xxxx */ am_const_direct, /* @xxxx, compilerconstant, can never be accessed * by pointer or be written to by user */ am_immed, /* #data */ am_none, am_str, /* string */ am_line /* pseudo mode for line numbers */};#define MAX_POS_SHORT_FLOAT 2.5594E2#define MIN_POS_SHORT_FLOAT 7.8125E-3#define MAX_NEG_SHORT_FLOAT -7.8163E-3#define MIN_NEG_SHORT_FLOAT -2.5600E2#define MAX_SINGLE_FLOAT 3.4028234E38#define MIN_SINGLE_FLOAT -3.4028236E38/* register naming, special registers */#define REG_R0 ((REG) 0)#define REG_R1 ((REG) 1)#define REG_R2 ((REG) 2)#define REG_R3 ((REG) 3)#define REG_R4 ((REG) 4)#define REG_R5 ((REG) 5)#define REG_R6 ((REG) 6)#define REG_R7 ((REG) 7)#define REG_AR0 ((REG) 8)#define REG_AR1 ((REG) 9)#define REG_AR2 ((REG) 10)#define REG_AR3 ((REG) 11)#define REG_AR4 ((REG) 12)#define REG_AR5 ((REG) 13)#define REG_AR6 ((REG) 14)#define REG_AR7 ((REG) 15)#define REG_DP ((REG) 16)#define REG_IR0 ((REG) 17)#define REG_IR1 ((REG) 18)#define REG_BK ((REG) 19)#define REG_SP ((REG) 20)#define REG_ST ((REG) 21)#define REG_IE ((REG) 22)#define REG_IF ((REG) 23)#define REG_IOF ((REG) 24)#define REG_RS ((REG) 25)#define REG_RE ((REG) 26)#define REG_RC ((REG) 27)#define REG_MEMORY ((REG) 31) /* special flag for peephole optimizer */#define NUM_REGS 28 /* number of distinct registers */#define MAX_REG REG_RC#define FLOAT_REG 0X40 /* Flag for Floatregisteruse of R0-R7 */#define RESULT REG_R0 /* register returning function results */#define FRAMEPTR REG_AR7 /* frame pointer register */#define STACKPTR REG_SP /* system stack pointer register */#define MAX_ADDR REG_AR1 /* max. scratch address register (AR1) */#define MAX_DATA REG_R2 /* max. scratch data register (R2) */#define ALL_TEMPORARYS ( (1UL<<REG_R0)|(1UL<<REG_R1)|(1UL<<REG_R2)\ |(1UL<<REG_AR0)|(1UL<<REG_AR1) \ |(1UL<<REG_IR0)|(1UL<<REG_IR1))#define MASK_REG_DATA (0xFFUL << REG_R0)#define MASK_REG_ADDRESS (0xFFUL << REG_AR0)#define MASK_REG_ALL (0x0FFFFFFFUL)#define MAX_REG_STACK ((DEEP)30)#define UNUSED ((DEEP)-1)#define EMPTY ((DEEP)0)/* ** Defines what the register can be used for */#define D_REG ((REGTYPE)1) /* data register */#define A_REG ((REGTYPE)2) /* address register */#define F_REG ((REGTYPE)4) /* float register */#define I_REG ((REGTYPE)8) /* index register */#define S_REG ((REGTYPE)16) /* specialregister */#define T_REG ((REGTYPE)32) /* temporary register */#define DFAIS_REG ((REGTYPE)(A_REG | D_REG | F_REG | I_REG | S_REG))#define is_data_register(r) ((regtype[(int)r] & D_REG) != 0)#define is_address_register(r) ((regtype[(int)r] & A_REG) != 0)#define is_index_register(r) ((regtype[(int)r] & I_REG) != 0)#define is_float_register(r) ((regtype[(int)r] & F_REG) != 0)#define is_temporary_register(r) ((regtype[(int)r] & T_REG) != 0)#define is_temporary_data_register(r) ((regtype[(int)r] & (D_REG|T_REG)) == (D_REG|T_REG))#define is_temporary_address_register(r) ((regtype[(int)r] & (A_REG|T_REG)) == (A_REG|T_REG))#define is_temporary_index_register(r) ((regtype[(int)r] & (I_REG|T_REG)) == (I_REG|T_REG))#define is_temporary_float_register(r) ((regtype[(int)r] & (F_REG|T_REG)) == (F_REG|T_REG))#define is_address_or_index_register(r) ((regtype[(int)r] & (A_REG | I_REG)) != 0)#define is_same_register_type(r1,r2) ((regtype[(int)r1] & regtype[(int)r2] & (DFAIS_REG)) != 0)typedef unsigned char REGTYPE;/* support routines */#define SUP_FPDIV (const CHAR *)".Xfpdiv"#define SUP_FPREM (const CHAR *)".Xfprem"#define SUP_LDIV (const CHAR *)".Xldiv"#define SUP_LREM (const CHAR *)".Xlrem"#define SUP_ULDIV (const CHAR *)".Xuldiv"#define SUP_ULREM (const CHAR *)".Xulrem"#ifdef STACK_CHECK#define SUP_STACKCHECK (const CHAR *)".stackcheck"#endif /* STACK_CHECK */#ifndef _CODE_DEFINED#define _CODE_DEFINEDtypedef struct ocode CODE;#endif/* instruction lengths */enum itype{ OP_NOTYPE = 0, OP_INT = 1, OP_FLOAT = 2};typedef enum e_am AMODE; /* Addressing mode */typedef struct amode ADDRESS;typedef enum e_op OPCODE;typedef enum itype ITYPE;typedef unsigned long REGMASK;typedef signed char DEEP;typedef struct reglist REGLIST;typedef unsigned int PEEPFLAGS;typedef unsigned long REGBITMAP;typedef struct regmap PEEPINFO;typedef struct flowlist FLOWLISTENTRY;struct regmap{ REGBITMAP write; /* destination of an operation e.g. ldi ...,X */ REGBITMAP modified; /* source and destination o. a. o. addi ...,X */ REGBITMAP read; /* source of an operation : ldi X,... */ REGBITMAP used; /* needed for addressgeneration: *arn, */ REGBITMAP updated; /* updated during addressgeneration *arn++ */#ifdef REGISTER_FLOW_ANALYZER REGBITMAP used_later; /* For regusage flow analyzer, contains registers */ /* wich will be used later in codesequence */ REGBITMAP fixed; /* Marks registers which cannot be reassigned */#endif};
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