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📄 44blib.c

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/************************************************
 * NAME    : 44BLIB.C				            *
 ************************************************/

#include "44b.h"
#include "44blib.h"
#include "def.h"
#include "option.h"

#include <stdarg.h>
#include <string.h>
#include <stdlib.h>
#include <stdio.h>
#include <ctype.h>

#define STACKSIZE    0xa00 //SVC satck size(do not use user stack)
#define HEAPEND     (_ISR_STARTADDRESS-STACKSIZE-0x500) // = 0xc7ff000
	//SVC Stack Area:0xc(e)7ff000-0xc(e)7ffaff

extern char Image$$RW$$Limit[];

void *mallocPt=Image$$RW$$Limit;


/************************* SYSTEM *************************/
static int delayLoopCount=400;
void Delay(int time)
{
    int i,adjust=0;

    if(time==0)
    {
		time=200;
		adjust=1;
		delayLoopCount=400;
		rWTCON=((MCLK/1000000-1)<<8)|(2<<3);    //MCLK/1M,Watch-dog disable,1/64,interrupt disable,reset disable
		rWTDAT=0xffff;//for first update
		rWTCNT=0xffff;//resolution=64us	@any MCLK 
		rWTCON=((MCLK/1000000-1)<<8)|(2<<3)|(1<<5); //Watch-dog timer start
    }

    for(;time>0;time--)

	for(i=0;i<delayLoopCount;i++);

    if(adjust==1)
    {
		rWTCON=((MCLK/1000000-1)<<8)|(2<<3);//Watch-dog timer stop
		i=0xffff-rWTCNT;		//1count->64us, 200*400 cycle runtime = 64*i us
		delayLoopCount=8000000/(i*64);	//200*400:64*i=1*x:100 -> x=80000*100/(64*i)   
    }
}

/************************* PORTS ****************************/
void Port_Init(void)
{
// * Port of Group A Control Registers *.
#define     PA9     0           // 0 = Output 1 = ADDR24
#define     PA8     1           // 0 = Output 1 = ADDR23
#define     PA7     1           // 0 = Output 1 = ADDR22
#define     PA6     1           // 0 = Output 1 = ADDR21
#define     PA5     1           // 0 = Output 1 = ADDR20
#define     PA4     1           // 0 = Output 1 = ADDR19
#define     PA3     1           // 0 = Output 1 = ADDR18
#define     PA2     1           // 0 = Output 1 = ADDR17
#define     PA1     1           // 0 = Output 1 = ADDR16
#define     PA0     1           // 0 = Output 1 = ADDR0
    rPCONA = (PA9<<9)|(PA8<<8)|(PA7<<7)|(PA6<<6)|(PA5<<5)|(PA4<<4)|(PA3<<3)|(PA2<<2)|(PA1<<1)|PA0;
    rPDATA = 0x0;

// * Port of Group B Control Registers *.
#define     PB10    1           // 0 = Output 1 = nGCS5
#define     PB9     1           // 0 = Output 1 = nGCS4
#define     PB8     1           // 0 = Output 1 = nGCS3
#define     PB7     1           // 0 = Output 1 = nGCS2
#define     PB6     1           // 0 = Output 1 = nGCS1
#define     PB5     1           // 0 = Output 1 = nWBE3/nBE3/DQM3
#define     PB4     1           // 0 = Output 1 = nWBE2/nBE2/DQM2
#define     PB3     1           // 0 = Output 1 = nSRAS/nCAS3
#define     PB2     1           // 0 = Output 1 = nSCAS/nCAS2
#define     PB1     1           // 0 = Output 1 = SCLK
#define     PB0     1           // 0 = Output 1 = SCKE
    rPCONB = (PB10<<10)|(PB9<<9)|(PB8<<8)|(PB7<<7)|(PB6<<6)|(PB5<<5)|(PB4<<4)|(PB3<<3)|(PB2<<2)|(PB1<<1)|PB0;
    rPDATB = 0x7ff;

// * Port of Group C Control Registers *.
#define     PC15    1           // 00 = Input 01 = Output 10 = DATA31 11 = nCTS0
#define     PC14    1           // 00 = Input 01 = Output 10 = DATA30 11 = nRTS0
#define     PC13    3           // 00 = Input 01 = Output 10 = DATA29 11 = RxD1
#define     PC12    3           // 00 = Input 01 = Output 10 = DATA28 11 = TxD1
#define     PC11    3           // 00 = Input 01 = Output 10 = DATA27 11 = nCTS1
#define     PC10    3           // 00 = Input 01 = Output 10 = DATA26 11 = nRTS1
#define     PC9     1           // 00 = Input 01 = Output 10 = DATA25 11 = nXDREQ1
#define     PC8     1           // 00 = Input 01 = Output 10 = DATA24 11 = nXDACK1
#define     PC7     3           // 00 = Input 01 = Output 10 = DATA23 11 = VD4
#define     PC6     3           // 00 = Input 01 = Output 10 = DATA22 11 = VD5
#define     PC5     3           // 00 = Input 01 = Output 10 = DATA21 11 = VD6
#define     PC4     3           // 00 = Input 01 = Output 10 = DATA20 11 = VD7
#define     PC3     1           // 00 = Input 01 = Output 10 = DATA19 11 = IISCLK  LED3
#define     PC2     1           // 00 = Input 01 = Output 10 = DATA18 11 = IISDI   LED2
#define     PC1     1           // 00 = Input 01 = Output 10 = DATA17 11 = IISDO   LED1
#define     PC0     1           // 00 = Input 01 = Output 10 = DATA16 11 = IISLRCK PUDIS12
    rPCONC = (PC15<<30)|(PC14<<28)|(PC13<<26)|(PC12<<24)|(PC11<<22)|(PC10<<20)|(PC9<<18)|(PC8<<16)|(PC7<<14)|(PC6<<12)|(PC5<<10)|(PC4<<8)|(PC3<<6)|(PC2<<4)|(PC1<<2)|PC0;
    rPDATC = 0x0ffff;            // All I/O Is High
    rPUPC  = ~0x0ff00;           // PULL UP RESISTOR should be enabled to I/O

// Port of Group D Control Registers.
#define     PD7     2           // 00 = Input 01 = Output 10 = VFRAME 11 = Reserved
#define     PD6     2           // 00 = Input 01 = Output 10 = VM     11 = Reserved
#define     PD5     2           // 00 = Input 01 = Output 10 = VLINE  11 = Reserved
#define     PD4     2           // 00 = Input 01 = Output 10 = VCLK   11 = Reserved
#define     PD3     2           // 00 = Input 01 = Output 10 = VD3    11 = Reserved
#define     PD2     2           // 00 = Input 01 = Output 10 = VD2    11 = Reserved
#define     PD1     2           // 00 = Input 01 = Output 10 = VD1    11 = Reserved
#define     PD0     2           // 00 = Input 01 = Output 10 = VD0    11 = Reserved
    rPCOND = (PD7<<14)|(PD6<<12)|(PD5<<10)|(PD4<<8)|(PD3<<6)|(PD2<<4)|(PD1<<2)|PD0;
    rPDATD = 0xff;
	rPUPD  = 0x0;

// Port of Group E Control Registers.
#define     PE8     2           // 00 = Reserved(ENDIAN) 01 = Output 10 = CODECLK 11 = Reserved
#define     PE7     1           // 00 = Input 01 = Output 10 = TOUT4 11 = VD7
#define     PE6     1           // 00 = Input 01 = Output 10 = TOUT3 11 = VD6
#define     PE5     1           // 00 = Input 01 = Output 10 = TOUT2 11 = TCLK in
#define     PE4     1           // 00 = Input 01 = Output 10 = TOUT1 11 = TCLK in
#define     PE3     1           // 00 = Input 01 = Output 10 = TOUT0 11 = Reserved
#define     PE2     2           // 00 = Input 01 = Output 10 = RxD0  11 = Reserved
#define     PE1     2           // 00 = Input 01 = Output 10 = TxD0  11 = Reserved
#define     PE0     3           // 00 = Input 01 = Output 10 = Fpllo out 11 = Fout out
    rPCONE = (PE8<<16)|(PE7<<14)|(PE6<<12)|(PE5<<10)|(PE4<<8)|(PE3<<6)|(PE2<<4)|(PE1<<2)|PE0;
    rPDATE = 0x1ff;  	        // All I/O Is High
    rPUPE  = 0x06;	            // PE8 do not have programmable pull-up resistor.  

// Port of Group F Control Registers.
#define     PF8     4           // 000 = Input 001 = Output 010 = nCTS1 011 = SIOCLK 100 = IISCLK Others = Reserved
#define     PF7     4           // 000 = Input 001 = Output 010 = RxD1  011 = SIORxD 100 = IISDI Others = Reserved
#define     PF6     4           // 000 = Input 001 = Output 010 = TxD1  011 = SIORDY 100 = IISDO Others = Reserved
#define     PF5     4           // 000 = Input 001 = Output 010 = nRTS1 011 = SIOTxD 100 = IISLRCK Others = Reserved
#define     PF4     1           // 00 = Input 01 = Output 10 = nXBREQ 11 = nXDREQ0
#define     PF3     1           // 00 = Input 01 = Output 10 = nXBACK 11 = nXDACK0
#define     PF2     1           // 00 = Input 01 = Output 10 = nWAIT 11 = Reserved
#define     PF1     2           // 00 = Input 01 = Output 10 = IICSDA 11 = Reserved
#define     PF0     2           // 00 = Input 01 = Output 10 = IICSCL 11 = Reserved
    rPCONF = (PF8<<19)|(PF7<<16)|(PF6<<13)|(PF5<<10)|(PF4<<8)|(PF3<<6)|(PF2<<4)|(PF1<<2)|PF0;
    rPDATF = 0x1ff;	            // All I/O Is High
    rPUPF  = 0x163;

// Port of Group G Control Registers.
#define     PG7     3           // 00 = Input 01 = Output 10 = IISLRCK 11 = EINT7
#define     PG6     3           // 00 = Input 01 = Output 10 = IISDO   11 = EINT6
#define     PG5     3           // 00 = Input 01 = Output 10 = IISDI   11 = EINT5
#define     PG4     3           // 00 = Input 01 = Output 10 = IISCLK  11 = EINT4
#define     PG3     3           // 00 = Input 01 = Output 10 = nRTS0   11 = EINT3
#define     PG2     3           // 00 = Input 01 = Output 10 = nCTS0   11 = EINT2
#define     PG1     3           // 00 = Input 01 = Output 10 = VD5     11 = EINT1
#define     PG0     3           // 00 = Input 01 = Output 10 = VD4     11 = EINT0
    rPCONG = (PG7<<14)|(PG6<<12)|(PG5<<10)|(PG4<<8)|(PG3<<6)|(PG2<<4)|(PG1<<2)|PG0;
    rPDATG = 0xff;
    rPUPG  = 0x00;               // should be enabled  

// Pull-up Control Register.
#define     HZSTOP  1           // 0 = Previous state of PAD 1 = HZ @ stop
#define     SPUCR1  1           // 0 = DATA[15:8] port pull-up resistor is enabled 1 = DATA[15:8] port pull-up resistor is disabled
#define     SPUCR0  1           // 0 = DATA[7:0] port pull-up resistor is enabled  1 = DATA[7:0] port pull-up resistor is disabled
    rSPUCR = (HZSTOP<<2)|(SPUCR1<<1)|SPUCR0;

// External Interrupt Control Register
#define     EINT7   2           // 000 = Low level interrupt 001 = High level interrupt
                                // 01x = Falling edge triggered 10x = Rising edge triggered
                                // 11x = Both edge triggered
#define     EINT6   2           // ...
#define     EINT5   2           // ...
#define     EINT4   2           // ...
#define     EINT3   2           // ...
#define     EINT2   2           // ...
#define     EINT1   2           // ... 
#define     EINT0   2           // ...
    rEXTINT = (EINT7<<28)|(EINT6<<24)|(EINT5<<20)|(EINT4<<14)|(EINT3<<12)|(EINT2<<8)|(EINT1<<4)|EINT0;
}


/************************* UART ****************************/

static int whichUart=0;

void Uart_Init(int mclk,int baud)
{
    int i;
    if(mclk==0)
	mclk=MCLK;
    rUFCON0=0x0;     //FIFO disable
    rUFCON1=0x0;
    rUMCON0=0x0;
    rUMCON1=0x0;
//UART0
    rULCON0=0x3;     //Normal,No parity,1 stop,8 bit
    rUCON0=0x245;    //rx=edge,tx=level,disable timeout int.,enable rx error int.,normal,interrupt or polling
    rUBRDIV0=( (int)(mclk/16./baud + 0.5) -1 ); 
   

//UART1
    rULCON1=0x3;
    rUCON1=0x245;
    rUBRDIV1=( (int)(mclk/16./baud + 0.5) -1 );

    for(i=0;i<100;i++);
}


void Uart_Select(int ch)
{
    whichUart=ch;
}


void Uart_TxEmpty(int ch)
{
    if(ch==0)
	while(!(rUTRSTAT0 & 0x4)); //wait until tx shifter is empty.
    else
    	while(!(rUTRSTAT1 & 0x4)); //wait until tx shifter is empty.
}


char Uart_Getch(void)
{
    if(whichUart==0)
    {	    
	while(!(rUTRSTAT0 & 0x1)); //Receive data read
	return RdURXH0();
    }
    else
    {
	while(!(rUTRSTAT1 & 0x1)); //Receive data ready
	return	rURXH1;
    }
}


char Uart_GetKey(void)
{
    if(whichUart==0)
    {	    
	if(rUTRSTAT0 & 0x1)    //Receive data ready
    	    return RdURXH0();
	else
	    return 0;
    }
    else
    {
	if(rUTRSTAT1 & 0x1)    //Receive data ready
	    return rURXH1;
	else

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