jiaotongdeng.map.summary

用Verilog HDL语言编写的交通灯程序

Analysis & Synthesis Status : Successful - Mon Jun 23 18:01:17 2008
Quartus II Version : 5.1 Build 176 10/26/2005 SJ Full Version
Revision Name : jiaotongdeng
Top-level Entity Name : dingceng
Family : MAX7000S
Total macrocells : 78
Total pins : 20