dma54xx.h

5416完整例程

#else
#define __INLINE
#endif



/*----------------------------------------------------------------------------*/
/* MACRO DEFINITIONS                                                          */
/*----------------------------------------------------------------------------*/
                     
/******************************************************************/
/* DMA_ENABLE - enable selected DMA channel                       */
/*                                                                */
/******************************************************************/
#define DMA_ENABLE(chan) \
		SET_BIT(DMPRE_ADDR, chan)


/******************************************************************/
/* DMA_DISABLE - disable selected DMA channel                     */
/*                                                                */
/******************************************************************/
#define DMA_DISABLE(chan) \
		RESET_BIT(DMPRE_ADDR, chan)


/******************************************************************/
/* DMA_AUTO_ENABLE - enable selected DMA channel with auto-init   */
/*                                                                */
/******************************************************************/
#define DMA_AUTO_ENABLE(chan) \
		((DMA_SUBREG_BITWRITE(chan, DMMCR_SUBADDR, AUTOINIT,\
		AUTOINIT_SZ, AUTOINIT_ENABLE)), (SET_BIT(DMPRE_ADDR, chan))) 
		

/******************************************************************/
/* DMA_FREE_RUNNING - enable DMA free running                     */
/*                                                                */
/******************************************************************/
#define DMA_FREE_RUNNING \
		SET_BIT(DMPRE_ADDR, DMA_FREE)


/******************************************************************/
/* DMA_NO_FREE_RUNNING - disable DMA free running                 */
/*                                                                */
/******************************************************************/
#define DMA_NO_FREE_RUNNING \
		RESET_BIT(DMPRE_ADDR, DMA_FREE)


/******************************************************************/
/* DMA_FRAMECOUNT - set number of frames in multi-frame transfer  */
/*                                                                */
/******************************************************************/
#define DMA_FRAMECOUNT(chan, value) \
        DMA_SUBREG_BITWRITE(chan, DMSEFC_SUBADDR, FRAMECOUNT,\
        					FRAMECOUNT_SZ, value)
	

/******************************************************************/
/* DMA_INTMASK_ENABLE - enable DMA interrupt                      */
/*                                                                */
/******************************************************************/
#define DMA_INTMASK_ENABLE(chan) \
		DMA_SUBREG_BITWRITE(chan, DMMCR_SUBADDR, DINM, DINM_SZ, DINM_ENABLE)


/******************************************************************/
/* DMA_INTMASK_DISABLE - disable DMA interrupt                    */
/*                                                                */
/******************************************************************/
#define DMA_INTMASK_DISABLE(chan) \
		DMA_SUBREG_BITWRITE(chan, DMMCR_SUBADDR, DINM, DINM_SZ, DINM_DISABLE)


/******************************************************************/
/* DMA_DMS_SELECT - set Source Space Select                       */
/*                                                                */
/******************************************************************/
#define DMA_DMS_SELECT(chan, value) \
		DMA_SUBREG_BITWRITE(chan, DMMCR_SUBADDR, DMS, DMS_SZ, value)

		        
/******************************************************************/
/* DMA_DMD_SELECT - set Destination Space Select                  */
/*                                                                */
/******************************************************************/
#define DMA_DMD_SELECT(chan, value) \
		DMA_SUBREG_BITWRITE(chan, DMMCR_SUBADDR, DMD, DMD_SZ, value)

        
/*-----------------------------------------------------------------------------*/
/* FUNCTION DEFINITIONS                                                        */
/*-----------------------------------------------------------------------------*/

/******************************************************************************/
/* dma_init -  Initialize channel specific control registers.                 */
/*                                                                            */
/*     This function is responsible for setting the DMA control registers,    */
/*     source address, destination address and the corresponding pages        */
/*     transfer count for the specified DMA channel.                          */
/*                                                                            */
/******************************************************************************/

void    dma_init(             /*RET: OK or ERROR (invalid channel)  */
             unsigned int channel      /*IN: DMA channel number              */
            ,unsigned int dmsefc       /*IN: Value to set sync & fr reg      */
            ,unsigned int dmmcr        /*IN: Value to set mode control reg   */
		,unsigned int dmctr	   /*IN: Value to set element count reg  */
            ,unsigned int src_page     /*IN: Value to set source page reg    */
            ,unsigned int src_addr     /*IN: Value to set source addr reg    */
            ,unsigned int dst_page     /*IN: Value to set dest page reg      */
            ,unsigned int dst_addr     /*IN: Value to set dest addr reg      */
                );

/******************************************************************************/
/* dma_global_init -  Initialize global control registers.                    */
/*                                                                            */
/*     This function is responsible for setting the DMA global control        */
/*     registers                                                              */
/*     Notice: DMDSTP and DMSRCP are used in DMA_GLOBAL_INIT and DMA_INIT     */
/*             necessity should be reconsidered                               */
/******************************************************************************/
void     dma_global_init(     /*RET: VOID function                  */
              unsigned int dmpre       /*IN:Value for priority and enable reg*/
             ,unsigned int dmsrcp      /*IN:Value for source page reg        */
             ,unsigned int dmdstp      /*IN:Value for dest page reg          */
             ,unsigned int dmidx0      /*IN:Value for element index reg 0    */
             ,unsigned int dmidx1      /*IN:Value for element index reg 1    */
             ,unsigned int dmfri0      /*IN:Value for frame index reg 0      */
             ,unsigned int dmfri1      /*IN:Value for frame index reg 1      */
             ,unsigned int dmgsa       /*IN:Value for global src addr reload */
             ,unsigned int dmgda       /*IN:Value for global dst addr reload */
             ,unsigned int dmgcr       /*IN:Value for global count reload reg*/
             ,unsigned int dmgfr       /*IN:Value for global frame reload reg*/
                        );

void     dma_reset_all(void);
void     dma_reset(unsigned int channel);

#endif /* _DMA_H_ */