📄 chap1.c
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// Chapter 1 6812 C programs// Jonathan W. Valvano// This software accompanies the book,// Embedded Microcomputer Systems: Real Time Interfacing// published by Brooks Cole, 1999// Program 1.2. 6812 software to enable the timer system.#define TSCR *(unsigned char volatile*)(0x0086)#define TMSK2 *(unsigned char volatile*)(0x008D) TSCR = 0x80; // enable TCNT TMSK2= 0x33; // 1_s clock// Program 1.4. 6812 C software that programs its internal EEPROM.#define EraseAll 0x06#define EraseWord 0x16#define EraseRow 0x0E#define ProgWord 0x02int Program(char command, volatile int *address, int data){ char oldEEPROT; int Endt; oldEEPROT=EEPROT; // read and save EEPROT=0; EEPROG=command; // BULKP=0, ELAT=1, EEPRGM=0 EEPROG++; // sets EEPRGM=1 (*address)=data; // latch address, data Endt=TCNT+10000; // TCNT value 10 ms from now while(EndT-TCNT>0); // wait until TCNT passes EndT EEPROG=0; // normal mode EEPROT=oldEEPROT; // restore return (*address);} // value at that address// Program 1.5. Helper functions used to program MC68HC91B32 flash EEPROM.void wait(int time){ int Endt; // works for time<32678 Endt=TCNT+time; // TCNT value time cycles from now while(EndT-TCNT>0); // wait until TCNT passes EndT}int IsFlashErased(void){int *pt; // returns true if flash erased for(pt=(int*)0x8000;pt<(int*)0xf800;pt++){ if(*pt!=0xFFFF) return 0; // not erased } return 1;} // erased// Program 1.6. Software that erases the MC68HC91B32 flash EEPROM.#define tEPULSE 27500 // erase pulse 110000_s/4_s#define tVERASE 250 // verify erase 1000_s/4_s#define nEP 5 // maximum erase pulsesint EraseFlash(void){ // returns true if successfulunsigned int numErases=0; // number of erases attemptedint bErased=0; // set to true when flash erased if(!(FEECTL&0x08)) return 0; // SVFP return if no +12 TSCR = 0x80; // enable TCNT TMSK2= 0x35; // 4_s clock FEECTL=0x06; // ERAS and LAT *(int*)0x8000=0; // write anywhere to latch address while((!bErased)&&(numErases<nEP)){ FEECTL=0x07; // ERAS LAT and ENPE enable erase wait(tEPULSE); // wait 110 ms FEECTL=0x06; // turn off ENPE wait(tVERASE); // wait 1 ms numErases++; bErased=IsFlashErased(); } if(bErased){ // if successful after numErases tries do{ FEECTL=0x07; // ERAS LAT and ENPE enable erase wait(tEPULSE); // wait 110 ms FEECTL=0x06; // turn off ENPE wait(tVERASE); // wait 1 ms } while (--numErases); } bErased=IsFlashErased(); FEECTL=0x00; // turn off return bErased;}// Program 1.7. Software that programs the MC68HC91B32 flash EEPROM.#define tPPULSE 200 // program pulse 25us/125ns#define tVPROG 80 // verify program 10us/125ns#define nPP 50 // maximum program pulsesint ProgramFlash(volatile int *address, int data){ unsigned int numProg=0; // number of programs attemptedint bProg=0; // set to true when flash programmed if(!(FEECTL&0x08)) return 0; // SVFP return if no +12 TSCR = 0x80; // enable TCNT TMSK2= 0x30; // 125ns clock FEECTL=0x02; // LAT *address=data; // address and data latched while((!bProg)&&(numProg<nPP)){ FEECTL=0x03; // LAT and ENPE enable erase wait(tPPULSE); // wait 25us FEECTL=0x02; // turn off ENPE wait(tVPROG); // wait 10us numProg++; bProg=(*address==data); } if(bProg){ // if successful after numProg tries do{ FEECTL=0x03; // LAT and ENPE enable erase wait(tPPULSE); // wait 25us FEECTL=0x02; // turn off ENPE wait(tVPROG); // wait 10us } while (--numProg); } bProg=(*address==data); FEECTL=0x00; // turn off return bProg;} // Program 1.12. C definitions of some of the MC68HC812A4 I/O ports.#define PORTA *(unsigned char volatile *)(0x0000)// General Purpose I/O Port#define PORTB *(unsigned char volatile *)(0x0001)// General Purpose I/O Port#define DDRA *(unsigned char volatile *)(0x0002)// Data Direction Register#define DDRB *(unsigned char volatile *)(0x0003)// Data Direction Register#define PORTC *(unsigned char volatile *)(0x0004)// General Purpose I/O Port#define PORTD *(unsigned char volatile *)(0x0005)// General Purpose I/O Port#define DDRC *(unsigned char volatile *)(0x0006)// Data Direction Register#define DDRD *(unsigned char volatile *)(0x0007)// Data Direction Register#define PORTE *(unsigned char volatile *)(0x0008)#define DDRE *(unsigned char volatile *)(0x0009)// Data Direction Register#define PORTH *(unsigned char volatile *)(0x0024)// General Purpose I/O Port, Key wakeup, interrupt#define DDRH *(unsigned char volatile *)(0x0025)// Data Direction Register#define PORTJ *(unsigned char volatile *)(0x0028)// General Purpose I/O Port, Key wakeup, interrupt#define DDRJ *(unsigned char volatile *)(0x0029)// Data Direction Register#define PORTF *(unsigned char volatile *)(0x0030)// General Purpose I/O Port, Chip select logic#define PORTG *(unsigned char volatile *)(0x0031)// General Purpose I/O Port#define DDRF *(unsigned char volatile *)(0x0032)// Data Direction Register#define DDRG *(unsigned char volatile *)(0x0033)// Data Direction Register#define PORTAD *(unsigned char volatile *)(0x006F)// Analog input General Purpose Input Port#define TCNT *(unsigned short volatile *)(0x0084)// 16-bit Timer#define PORTT *(unsigned char volatile *)(0x00AE)// Timer Input/Output Port General Purpose I/O Port#define DDRT *(unsigned char volatile *)(0x00AF)// Data Direction Register#define SC0BD *(unsigned short volatile *)(0x00C0)// 16-bit Baud rate Register#define SC0CR1 *(unsigned char volatile *)(0x00C2)// Serial Port Control Register#define SC0CR2 *(unsigned char volatile *)(0x00C3)// Serial Port Control Register#define SC0SR1 *(unsigned char volatile *)(0x00C4)// Serial Port Status Register#define SC0SR2 *(unsigned char volatile *)(0x00C5)// Serial Port Status Register#define SC0DRH *(unsigned char volatile *)(0x00C6)// high byte of Serial Port Data#define SC0DRL *(unsigned char volatile *)(0x00C7)// Serial Port Data Register#define PORTS *(unsigned char volatile *)(0x00D6)// Serial Input/Output Port General Purpose I/O port #define DDRS *(unsigned char volatile *)(0x00D7)// Data Direction Register// Program 1.15. C software that reads from port A and writes to port B.// Program to implement a NOT gate// Port A are the 8 digital inputs and Port B are the 8 digital outputs// Software continuously repeats the following// 1) Read value from Port A// 2) Calculate the logical complement// 3) Write the result out to Port B#include "HC12.H"void main(void){ unsigned char data; while(1){ data = PORTA; // Read from Port A data = ~data; // Logical complement PORTB = data; // Write from to Port B}}// Program 1.17. C software that initializes an I/O port to input.// MC68HC812A4 DDRJ=0x00;// MC68HC912B32 DDRA=0x00;// Program 1.19. C software that reads from an I/O port input.// MC68HC812A4 Happiness=PORTJ;//MC68HC912B32 Happiness=PORTA;// Program 1.21. C software that initializes an I/O port to output.// MC68HC812A4 DDRJ=0x0F;// MC68HC912B32 DDRA=0x0F;// Program 1.23. C software that outputs an I/O port output.// MC68HC812A4 PORTJ=0xFF;// MC68HC912B32 PORTA=0xFF;// Program 1.25. C functions that provide initialization, // read and write access an I/O port.// MC68HC812A4void Init(unsigned char value){ DDRJ=value;}void Set(unsigned char value){ PORTJ=value;}unsigned char Read(void){ return(PORTJ);}// MC68HC912B32void Init(unsigned char value){ DDRA=value;}void Set(unsigned char value){ PORTA=value;}unsigned char Read(void){ return(PORTA);}// Program 1.28. C programs that implement the 4 bit NOT gate.// HC05C4, HC708XL36, HC11A8, HC812A4void init(void){ DDRC=0xF0;} // PC7-PC4 are outputs, PC3-PC0 are inputsvoid main(void){ unsigned char data; init(); // call ritual once while(1){ data=PORTC; // input data=(~data)<<4; // complement and shift PORTC=data;}} // output
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