📄 chap4.asm
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* No parametersInitFifo tpa sei make atomic, entering critical section clr PutI clr GetI clr Size Empty when Size == 0 tap end critical section rts; Program 4.24. Assembly routine to put into a two index with counter FIFO. ***********Put a byte into the FIFO******************* Input RegA contains 8 bit data to put* Output RegA is -1 if successful, 0 if data not storedPutFifo psha tpa tab pula pshb save old CCR sei make atomic, entering critical section ldab Size cmpb #FifoSize Full if Size==FifoSize beq PutNotFull clra bra PutDonePutNotFull incb stab Size Size++ ldx #Fifo ldab PutI abx staa 0,x Put data into fifo incb cmpb #FifoSize bne PutNoWrap skip if no wrapping needed clrb Wrap PutNoWrap clra sucess coma RegA=-1 means OK stab PutIPutDone tab end critical section pula tpa restore CCR to previous value tba rts; Program 4.25. Assembly routine to get from a two index with counter FIFO. ***********Get a byte from the FIFO******************* Input RegX points to place for 8 bit data from Get* Output RegA is -1 if successful, 0 if Fifo was empty when calledGetFifo tpa psha save old CCR sei make atomic, entering critical section clra assume it will fail tst Size beq GetDone ldy #Fifo ldab GetI aby coma RegA=-1 means OK ldab 0,y Data from FIFO stab 0,x Return by reference ldab GetI incb cmpb #FifoSize bne GetNoWrap skip if no wrapping needed clrb Wrap GetNoWrap stab GetIGetDone tab end critical section pula tpa restore CCR to previous value tba rts; Program 4.27. Example of a vectored interrupt. ; MC68HC812A4TimeHan ldaa #$80 ;TOF is bit 7 staa TFLG2 ;clear TOF;*Timer interrupt calculations* rtiExtHan ldaa #$01 ;Ack staa KWIFJ ;clear flag;*External interrupt calculations* rti org $FFDE ;timer overflow fdb TimeHan org $FFD0 ;Key wakeup J fdb ExtHan; Program 4.28. Example of a polled interrupt. ; MC68HC812A4ExtHan brset KWIFJ,$01,KJ0Han brset KWIFJ,$02,KJ1Han swi ;errorKJ0Han ldaa #$01 ;Ack flag0 staa KWIFJ ;clear flag0;*KJ0 interrupt calculations* rtiKJ1Han ldaa #$02 ;Ack flag1 staa KWIFJ ;clear flag1;*KJ1 interrupt calculations* rti org $FFD0 ;Key wakeup J fdb ExtHan; Program 4.29. Interrupting keyboard software. ; MC68HC812A4; PJ6-PJ0 inputs = keyboard DATA; PJ7=STROBE interrupt on riseInit sei ; make atomic clr DDRJ ;all inputs ldaa #$80 staa KPOLJ ;rising edge PJ7 staa KWIEJ ;arm PJ7 staa KWIFJ ;clear flag7 jsr InitFifo cli ;Enable IRQ rts ExtHan brset KWIFJ,$80,KeyHan swi ;errorKeyHan ldaa #$80 ;Ack flag7 staa KWIFJ ;clear flag7 ldaa PORTJ anda #$7F jsr PutFifo rti org $FFD0 ;Key wakeup J fdb ExtHan; Program 4.31. Helper routines for the printer interface. ; MC68HC812A4;*****goes in RAM**************OK rmb 1 ;0=busy, 1=doneLine rmb 20 ;ASCII, end with 0Pt rmb 2 ;pointer to Line;*****goes in ROM**************;Input RegX=>stringFill ldy #Line ;RegX=>string sty Pt ;initialize pointerFloop ldaa 1,X+ ;copy data staa 1,Y+ tsta ;end? bne Floop clr OK rts;Return RegA=dataGet ldx Pt ldaa 1,X+ ;read data stx Pt rts; Program 4.32. Initialization routines for the printer interface. ; MC68HC812A4; PH6-PH0 outputs = printer DATA; PJ1=READY interrupt on rise;Input RegX=>stringInit sei ; make atomic bsr Fill ;Init global ldaa #$FF staa DDRH ;PH6-0 outputs ldaa #$01 ;PJ0 output START staa DDRJ ;PJ1 input ldaa #$02 staa KPOLJ ;rising edge PJ1 staa KWIEJ ;arm PJ1 staa KWIFJ ;clear flag1 bsr Get bsr Out ;start first cli ;Enable IRQ rts Out clr PORTJ ;START=0 staa PORTH ;write DATA inc PORTJ ;START=1 rts; Program 4.33. ISR routines for the printer interface. ; MC68HC812A4ExtHan brset KWIFJ,$02,PrtHan swi ;errorPrtHan ldaa #$02 ;Ack flag1 staa KWIFJ ;clear flag1 bsr Get tsta beq Disarm bsr Out ;start next bra Done Disarm clr KWIEJ ;disarm PJ1 inc OK ;line completeDone rti org $FFD0 ;Key wakeup J fdb ExtHan; Program 4.35. Assembly software for the XIRQ interrupt. * Called to initialize the power systemRITUAL ldaa #$FF staa DDRB Port B outputs (6812 only) ldaa #0 Backup power initially off staa PORTB Set the flip flop, make XIRQ=1 ldaa #1 staa PORTB Flip flop ready to receive rising edge of TooLow ldaa #$10 Enable XIRQ, Disable IRQ tap rts Back to main, foreground thread*Note that the software can only enable XIRQ and can not disable XIRQ.* In this way, XIRQ is non-maskable.XIRQHAN ldaa #2 staa PORTB Enable BackUp power, acknowledge XIRQ ldaa #3 staa PORTB Will thread another rising edge of TooLow rti org $FFF4 fdb XIRQHAN XIRQ interrupt vector; Program 4.40. 6812 assembly structure for interrupt polling using linked lists. start fdb llPJ2 place to start pollingMask equ 0 and maskDevHan equ 1 device handlerNextPt equ 3 next pointernum fcb 3 number of devicesllPJ2 fcb $04 look at bit 2 fdb PJ2han device handler fdb llPJ1 pointer to next device to pollllPJ1 fcb $02 look at bit 1 fdb PJ1han device handler fdb llPJ0 pointer to next device to pollllPJ0 fcb $01 look at bit 0 fdb PJ0han device handler fdb 0 end of list; Program 4.41. 6812 assembly implementation of interrupt polling using linked lists. IrqHan ldx start Reg X points to linked list place to start ldab num number of possible devicesnext ldaa KWIFJ read status anda Mask,x check if proper bit is set beq Notyet skip if this device not requesting jsr [DevHan,x] call device handler, will return hereNotyet ldx NextPt,x Reg X points to next entry decb device counter bne next check next device rti ; Program 4.48. 6812 assembly implementation of a periodic interrupt using real time interrupt. RITUAL sei disable interrupts during RITUAL ldaa #$86 Set RTR2-0 = 110 Interrupt period = 32.768ms staa RTICTL Set RTIE=1 arm RTI interrupts cli Enable IRQ interrupts rtsRTIHAN ldaa RTIFLG Polling for zeros and ones expect=10000000 cmpa #$80 RTIF should equal 1 beq OK swi ErrorOK ldaa #$80 RTIF is cleared by writing to RTIFLG staa RTIFLG with bit 7 set* service occurs every 32.768ms or about 30.517Hz rti; Program 4.50. 6812 assembly implementation of a periodic interrupt using timer overflow. RITUAL sei disable interrupts during RITUAL ldaa #$B2 Set PR2-0 = 010 Interrupt period = 32.768ms staa TMSK2 Set TOI=1 arm TOF interrupts ldaa #$80 TEN=1 staa TSCR enable TCNT cli Enable IRQ interrupts rtsTOFHAN ldaa TFLG2 Polling for zeros and ones expect=10000000 cmpa #$80 RTIF should equal 1 beq OK swi ErrorOK ldaa #$80 TOF is cleared by writing to TFLG2 staa TFLG2 with bit 7 set* service occurs every 32.768ms or about 30.517Hz rti
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