testinstruction.v

若干VHDL语言的源代码

//add r0 with 11111111 to r1
`define TestInstruction_Add1	32'b1110_0010_1000_0000_0001_0000_1111_1111
//add r1 with 00000000 to r3
`define TestInstruction_Add2	32'b1110_0010_1000_0001_0011_0000_0000_0000