xllp_mmc.c

Xcale270Bsp包,wince平台

/******************************************************************************
**
**  COPYRIGHT (C) 2001, 2002 Intel Corporation.
**
**  This software as well as the software described in it is furnished under
**  license and may only be used or copied in accordance with the terms of the
**  license. The information in this file is furnished for informational use
**  only, is subject to change without notice, and should not be construed as
**  a commitment by Intel Corporation. Intel Corporation assumes no
**  responsibility or liability for any errors or inaccuracies that may appear
**  in this document or any software that may be provided in association with
**  this document. 
**  Except as permitted by such license, no part of this document may be 
**  reproduced, stored in a retrieval system, or transmitted in any form or by
**  any means without the express written consent of Intel Corporation. 
**
**  FILENAME:       xllp_mmc.c
**
**  PURPOSE: contains all primitive functions for Bulverde mmc register access 
**     and control
**                  
******************************************************************************/
#include "xllp_mmc.h"

/******************************************************************************
XDP_DOC_HDR_END

  Function Name: XllpMmcInit(P_XLLP_GPIO_T gpio_regs, P_XLLP_CLOCK_T clck_regs)

  Description: sets the alternate functions for GPIO and turns the mmc clock on 
  				in the clock controller 
			  				
  Global Registers Modified: gpios and clck registers 

  Input Arguments: P_XLLP_GPIO_T, P_XLLP_CLOCK_T
     
  Output Arguments:
     None
  
  return:
	true
	false

XLLP_DOC_HDR_END
*******************************************************************************/
void XllpMmcSdHWInit(P_XLLP_GPIO_T GpioReg, P_XLLP_CLKMGR_T ClckReg, P_XLLP_BCR_T BcrReg) 
{

// clearing the gpio alt func 

   GpioReg->GPDR1 |= XLLP_GPIO_BIT_MMCLK;				// set the direction for MMCCLK

    GpioReg->GAFR1_L &=~XLLP_GPIO_AF_BIT_MMCLK_MASK;
	GpioReg->GAFR1_L |= XLLP_GPIO_AF_MMCLK;	// set alternate function for gpio 32 MMCCLK

	GpioReg->GAFR3_U &=~XLLP_GPIO_AF_BIT_MMCMD_MASK;
    GpioReg->GAFR3_U |= XLLP_GPIO_AF_BIT_MMCMD;
   
    GpioReg->GAFR2_U &= ~XLLP_GPIO_AF_BIT_MMDAT0_MASK;
	GpioReg->GAFR2_U |= XLLP_GPIO_AF_BIT_MMDAT0;

    GpioReg->GAFR3_L &= ~XLLP_GPIO_AF_BIT_MMDAT1_MASK;
	GpioReg->GAFR3_L |=XLLP_GPIO_AF_BIT_MMDAT1;

	GpioReg->GAFR3_L &= ~XLLP_GPIO_AF_BIT_MMDAT2_MASK;
    GpioReg->GAFR3_L |=XLLP_GPIO_AF_BIT_MMDAT2;

	GpioReg->GAFR3_L &= ~XLLP_GPIO_AF_BIT_MMDAT3_MASK;
    GpioReg->GAFR3_L |=XLLP_GPIO_AF_BIT_MMDAT3;
#if 0	//hzh
    BcrReg->MISCWR1 &= ~(XLLP_BCR_MISCWR1_MS_SEL);
    BcrReg->MISCWR1 |= (XLLP_BCR_MISCWR1_MMC_ON);
#endif
  //  enabling MMC clock

	ClckReg->cken |= XLLP_CLKEN_MMC;

	
}

/******************************************************************************
XLLP_DOC_HDR_BEGIN

  Function Name: XllpMmcSdHwShutdown(P_XLLP_CLKMGR_T ClckReg, P_XLLP_BCR_T BcrReg)

  Description:  turns off board power and the clocks 

  Global Registers Modified: NA. 

  Input Arguments: P_XLLP_CLKMGR_T ClckReg, P_XLLP_BCR_T BcrReg
     

  Output Arguments:
     None
  
  Return Value: 

XLLP_DOC_HDR_END
*******************************************************************************/


void XllpMmcSdHwShutdown(P_XLLP_CLKMGR_T ClckReg, P_XLLP_BCR_T BcrReg)
{
 // turns off the power from the board level
 #if 0	//hzh
    BcrReg->MISCWR1 &= ~(XLLP_BCR_MISCWR1_MMC_ON);
#endif
	ClckReg->cken &= ~XLLP_CLKEN_MMC;

}

/******************************************************************************
XLLP_DOC_HDR_BEGIN

  Function Name: XllpMmcXtractResp(P_XLLP_MMC_T mmc_regs, P_XLLP_RSP1 response)

  Description:  returns the response out of the fifo with the response 
				structure filled in appropriately

  Global Registers Modified: NA. 

  Input Arguments: P_XLLP_MMC_T mmc_regs, P_XLLP_RSP1 response
     

  Output Arguments:
     None
  
  Return Value: 

XLLP_DOC_HDR_END
*******************************************************************************/

void XllpMmcXtractResp(P_XLLP_MMC_T mmcRegs, P_XLLP_UINT16_T buff, XLLP_MMC_RESPFRMT response)
{
  XLLP_UINT32_T count=3;
  if((mmcRegs->MMC_CMDAT & 0x3) == XLLP_MMC_MMCSPIR2)
     count = 8;	
  while(count)
  {	
 	 buff[--count]   =  (XLLP_UINT16_T)mmcRegs->MMC_RES;
//     printf("extract response %x\r\n", buff[count]);
  }
}
/******************************************************************************
XLLP_DOC_HDR_BEGIN

  Function Name: XllpMmcSetUpClock(P_XLLP_MMC_T mmc_regs, XLLP_UINT16_T rate)

  Description:  sets the clock rate and starts the clock
  Global Registers Modified: NA. 

  Input Arguments: P_XLLP_MMC_T mmc_regs, XLLP_UINT16_T rate     

  Output Arguments:
     None
  
  Return Value: 
     True, False

XLLP_DOC_HDR_END
*******************************************************************************/
void XllpMmcSetUpClock(P_XLLP_MMC_T mmcRegs, XLLP_MMC_CLKRATE rate, XLLP_BOOL_T strClck)
{
  mmcRegs->MMC_CLKRT = rate;
  if(strClck)
    mmcRegs->MMC_STRPCL = XLLP_STRPCL_STRTCLK;
}

/******************************************************************************
XLLP_DOC_HDR_BEGIN
  
  Function Name: XllpMmcSetupCmd(P_XLLP_MMC_T mmc_regs)

  Description:  puts the values the driver wants into the registers and 
				turns on the clock

  Global Registers Modified: NA. 

  Input Arguments: P_XLLP_MMC_T mmc_regs
     

  Output Arguments:
     None
  
  Return Value: 
     True, False

XLLP_DOC_HDR_END
*******************************************************************************/
XLLP_BOOL_T XllpMmcSdSetupCmd(P_XLLP_MMC_T mmcRegs, XLLP_MMC_CMD cmd, 
							XLLP_INT32_T arg, XLLP_INT32_T To, XLLP_BOOL_T fourBitMode )
{
  XLLP_BOOL_T dataTrans = XLLP_FALSE;
  XLLP_UINT16_T MMCCMDAT_MASK = 0x0;
 //  read command of any type
#ifdef NMD
    RETAILMSG(1,(TEXT("CMD: %x, ARG: %x,>\r\n"),cmd, arg));
#endif
// printf("CMD: %x, ARG: %x, \r\n",cmd, arg);
    mmcRegs->MMC_RESTO = To;			 
	mmcRegs->MMC_CMD = cmd;
	mmcRegs->MMC_ARGH = (arg >> 16);	 
	mmcRegs->MMC_ARGL = (arg & 0xffff);

  if(fourBitMode)
      MMCCMDAT_MASK |= XLLP_MMC_CMDAT_SD4DAT;

  if ( (cmd == XLLP_MMC_CMD11) ||
		(cmd == XLLP_MMC_SPICMD17) ||
		(cmd == XLLP_MMC_CMD18) ||
		( cmd == XLLP_SD_ACMD13 ) || 
		( cmd == XLLP_SD_ACMD51) )
	{
    if (cmd == XLLP_MMC_CMD11) //  stream bit set for stream command
 	  {
	  MMCCMDAT_MASK |= (XLLP_MMC_CMDAT_DATAEN | XLLP_MMC_MMCSPIR1 | XLLP_MMC_CMDAT_STRMBLK);
	  }
	else
	  {
      MMCCMDAT_MASK |= (XLLP_MMC_CMDAT_DATAEN | XLLP_MMC_MMCSPIR1 );
	  }
    dataTrans = XLLP_TRUE;
	}
  else
  //  write command of any type
  	if ( (cmd == XLLP_MMC_CMD20) ||
		(cmd == XLLP_MMC_SPICMD24) ||
		(cmd == XLLP_MMC_CMD25) )
	{
    	if (cmd == XLLP_MMC_CMD20) //  stream bit set for stream command
 	  	{
	  		MMCCMDAT_MASK |= (XLLP_MMC_CMDAT_DATAEN | XLLP_MMC_CMDAT_WRRD | 
	                        XLLP_MMC_MMCSPIR1 | XLLP_MMC_CMDAT_STRMBLK);
	  	}
		else
		{
      		MMCCMDAT_MASK |= (XLLP_MMC_CMDAT_DATAEN | XLLP_MMC_CMDAT_WRRD | XLLP_MMC_MMCSPIR1);
		}
	  	dataTrans = XLLP_TRUE;
	}
  else
  //  command that requires a busy bit
  	if( (cmd == XLLP_MMC_CMD7 )     ||  (cmd == XLLP_MMC_CMD12 )    ||   
      (cmd == XLLP_MMC_SPICMD28 ) ||  (cmd == XLLP_MMC_SPICMD29)  ||   
      (cmd == XLLP_MMC_SPICMD38 ) ||  (cmd == XLLP_MMC_SPICMD42)  ||  
      (cmd == XLLP_MMC_SPICMD56) )
	{
	  	MMCCMDAT_MASK |= ( XLLP_MMC_CMDAT_BUSY | XLLP_MMC_MMCSPIR1) ;
   	}
  else
  // command for a response type of 2
  	if ( (cmd == XLLP_MMC_CMD2) ||	(cmd == XLLP_MMC_SPICMD9) || (cmd == XLLP_MMC_SPICMD10) )
    {
		MMCCMDAT_MASK |= XLLP_MMC_MMCSPIR2;
	}
  else 
  // command for a response type of 3
  	if ((cmd == XLLP_MMC_SPICMD1)|| (cmd == XLLP_SD_ACMD41))
    {
		MMCCMDAT_MASK |= XLLP_MMC_MMCR3;
	}
  else
    if (cmd == XLLP_MMC_SPICMD0)
	{
//  command 0 for init the card to start the 80 clock cycles
		MMCCMDAT_MASK |= (XLLP_MMC_CMDAT_INIT | XLLP_MMC_NORESPONSE);
	}
  else
  	if (( cmd == XLLP_MMC_CMD4 ) | ( cmd == XLLP_MMC_CMD15 ))
	{
		MMCCMDAT_MASK |= XLLP_MMC_NORESPONSE;
	}
	else
  // all other commands are response 1 with no other special cases
		MMCCMDAT_MASK |= XLLP_MMC_MMCSPIR1;

  mmcRegs->MMC_CMDAT = MMCCMDAT_MASK;	

  return(dataTrans);

}

/******************************************************************************
XLLP_DOC_HDR_BEGIN

  Function Name: XllpMmcSetupCmd(P_XLLP_MMC_T mmc_regs)

  Description:  puts the values the driver wants into the registers and 
				turns on the clock

  Global Registers Modified: NA. 

  Input Arguments: P_XLLP_MMC_T mmc_regs
     

  Output Arguments:
     None
  
  Return Value: 
     True, False

XLLP_DOC_HDR_END
*******************************************************************************/
XLLP_BOOL_T XllpMmcSdSetupXCmd(P_XLLP_MMC_T mmcRegs, XLLP_INT32_T FlSz, 
							XLLP_INT32_T BlkSz, XLLP_INT32_T To )

{
 //  read command of any type
 
   if  ( ( mmcRegs->MMC_CMDAT & XLLP_MMC_CMDAT_WRRD ) != XLLP_MMC_CMDAT_WRRD)   
       mmcRegs->MMC_RDTO	= To;

   mmcRegs->MMC_NUMBLK = FlSz/BlkSz;
   mmcRegs->MMC_BLKLEN = BlkSz;

   return XLLP_FALSE;

}


/******************************************************************************
XLLP_DOC_HDR_BEGIN

  Function Name: XllpMmcInts(P_XLLP_MMC_T mmc_regs, XLLP_INT8_T SetMask, XLLP_INT8_T ClearMask)

  Description:  allows the user the pass in a bit defined (setBit) and then the function 
				turns the value around and masks it off appropriately  or clears a bit for
				interrupts

  Global Registers Modified: NA. 

  Input Arguments: P_XLLP_MMC_T mmc_regs
					SetMask is a bit defined 0-7
					ClearMask is a possible 7 bit value 
					
  Output Arguments:
     None
  
  Return Value: 
     True, False

XLLP_DOC_HDR_END
*******************************************************************************/
void XllpMmcSdInts(P_XLLP_MMC_T mmcRegs, XLLP_INT8_T SetMask)
{
  mmcRegs->MMC_I_MASK = ~SetMask;
}