xllp_icp.c

Xcale270Bsp包,wince平台

/******************************************************************************
**
**  COPYRIGHT (C) 2001, 2002 Intel Corporation.
**
**  This software as well as the software described in it is furnished under
**  license and may only be used or copied in accordance with the terms of the
**  license. The information in this file is furnished for informational use
**  only, is subject to change without notice, and should not be construed as
**  a commitment by Intel Corporation. Intel Corporation assumes no
**  responsibility or liability for any errors or inaccuracies that may appear
**  in this document or any software that may be provided in association with
**  this document. 
**  Except as permitted by such license, no part of this document may be 
**  reproduced, stored in a retrieval system, or transmitted in any form or by
**  any means without the express written consent of Intel Corporation. 
**
**  FILENAME:       xllp_icp.c
** 
**  PURPOSE: contains XLLP functions for Bulverde ICP.
**                  
******************************************************************************/
#include "xllp_defs.h"
#include "xllp_serialization.h"
#include "xllp_gpio.h"
#include "xllp_clkmgr.h"
#include "xllp_bcr.h"
#include "xllp_icp.h"    


void XllpIcpInit(P_XLLP_ICP_HANDLE_T pICPHandle)
{
	XLLP_UINT32_T   LockID;             // needed by XLLP serialization functions
	XLLP_UINT32_T   Counter;            // loop counter variable.	
    XLLP_VUINT32_T  temp;               // lvalue for flushing registers.
    XLLP_UINT32_T   aGpioPinArray[3];   // a maximum array size of 3 is needed.
	XLLP_UINT32_T   aAfValueArray[3];	// a maximum array size of 3 is needed.
	
    // ICP, Clock Manager, BCR, and GPIO register pointers.
    P_XLLP_ICP_T    pICPRegs    =  pICPHandle->pICPRegs;
    P_XLLP_CLKMGR_T pClkMgrRegs =  pICPHandle->pCLKMGRRegs;
    P_XLLP_GPIO_T   pGPIORegs   =  pICPHandle->pGPIORegs;
    P_XLLP_BCR_T    pBCRRegs    =  pICPHandle->pBCRRegs;
    
    // First disable the RX and TX logic, per instructions in Developer's Manual.
    pICPRegs->ICCR0 &= ~(XLLP_ICCR0_TXE + XLLP_ICCR0_RXE);
    
    // Configure the ICCR0 register to Reset Values.
    pICPRegs->ICCR0 = 0;

	// Configure the Clock Manager for FICP
    LockID = XllpLock(CKEN);
	pClkMgrRegs->cken |= XLLP_CLKEN_ICP;
	XllpUnlock(LockID);
    
    // See if any data is in the RX FIFO and remove it.
    Counter = pICPRegs->ICFOR & XLLP_ICFOR; // Read the ICP FIFO Occupancy Status Register
    if (Counter != 0)                       // if non-zero then empty the RX FIFO
    {
        for ( /* no need to init Counter again */; Counter != 0; Counter--)
        {
            temp = pICPRegs->ICDR;          // Read a character from the RX FIFO
        }
    }
    
    // Clear ICSR0 Sticky Status bits
     pICPRegs->ICSR0 = XLLP_ICSR0_TUR + XLLP_ICSR0_RAB + XLLP_ICSR0_FRE + XLLP_ICSR0_EOC;

	// Configure the GPIOs for FICP
    // Set Output signals high in Pin-Output Set Register.
	aGpioPinArray [0] = 1;	                            // Length = 1 for pin 47.
	aGpioPinArray [1] = XLLP_GPIO_ICP_TXD;              // pin 47
    LockID = XllpLock(GPSR1); 		
	XllpGpioSetOutputState1 (pGPIORegs, aGpioPinArray); // Call XLLP function         
    XllpUnlock(LockID);	   	

    // Clear input bits in Pin-Direction Register.
  	aGpioPinArray [0] = 1;	                            // Length = 1 for pin 46.
	aGpioPinArray [1] = XLLP_GPIO_ICP_RXD;              // pin 46
    LockID = XllpLock(GPDR1);  
	XllpGpioSetDirectionIn (pGPIORegs, aGpioPinArray);  // Call XLLP function      	       
    XllpUnlock(LockID);	
     	
    // Set output bits in Pin-Direction Register.
  	aGpioPinArray [0] = 1;	                            // Length = 1 for pin 47.
	aGpioPinArray [1] = XLLP_GPIO_ICP_TXD;              // pin 47
    LockID = XllpLock(GPDR1);         
	XllpGpioSetDirectionOut (pGPIORegs, aGpioPinArray); // Call XLLP function      	
    XllpUnlock(LockID);	
     	
    // Set FF fields in the Alternate Function Register.                                  
	aGpioPinArray [0] = 2;	                            // Length = 2 for pins 46, and 47
	aGpioPinArray [1] = XLLP_GPIO_ICP_RXD;              // pin 46
	aGpioPinArray [2] = XLLP_GPIO_ICP_TXD;              // pin 47
		
	aAfValueArray [0] = 2;	                            // Length = 2 for pins 46, and 47
	aAfValueArray [1] = XLLP_GPIO_AF_ICP_RXD;           // pin 46
	aAfValueArray [2] = XLLP_GPIO_AF_ICP_TXD;           // pin 47	
    LockID = XllpLock(GAFR1_L); 
	XllpGpioSetAlternateFn (pGPIORegs, aGpioPinArray, aAfValueArray); // Call XLLP function		                               
    XllpUnlock(LockID);	  

    // Configure the BCR Miscellaneous Write Register 1 IRDA Fields 
    // to user specified values.
    LockID = XllpLock(MISC_WR);
    pBCRRegs->MISCWR1 &= ~(XLLP_BCR_MISCWR1_IRDA_FIR + XLLP_BCR_MISCWR1_IRDA_MD); 
    pBCRRegs->MISCWR1 |= pICPHandle->BCR_MISCWR1_Value & (XLLP_BCR_MISCWR1_IRDA_FIR +
                         XLLP_BCR_MISCWR1_IRDA_MD);
  	XllpUnlock(LockID);
        
    // Set ICCR0 to user specified values.
    // Note Receive Enable and Transmit Enable are always cleared when modifying
    // ITR and LBM, per instructions in the Developer's Manual.
    pICPRegs->ICCR0 = pICPHandle->ICCR0_Value & (XLLP_ICCR0_ITR + XLLP_ICCR0_LBM +
                                                 XLLP_ICCR0_TUS + XLLP_ICCR0_RIE + 
                                                 XLLP_ICCR0_TIE + XLLP_ICCR0_AME);  
                                                 
    // Set ICCR1 to user specified values. 
    pICPRegs->ICCR1 = pICPHandle->ICCR1_Value & XLLP_ICCR1; 
    
    // Set ICCR2 to user specified values.
    pICPRegs->ICCR2 = pICPHandle->ICCR2_Value & (XLLP_ICCR2_TRIG16 + XLLP_ICCR2_TRIG32 +
                                                 XLLP_ICCR2_TXP + XLLP_ICCR2_RXP + 
                                                 XLLP_ICCR2_TRAIL + XLLP_ICCR2_BUS);     
        
    // Set ICCR0 Receive Enable and Transmit Enable to user specified values. 
    pICPRegs->ICCR0 = pICPHandle->ICCR0_Value & (XLLP_ICCR0_RXE + XLLP_ICCR0_TXE);                                                 
     
}// end of XllpIcpInit()