xllp_i2s.c

Xcale270Bsp包,wince平台

/******************************************************************************
**
**  COPYRIGHT (C) 2001, 2002 Intel Corporation.
**
**  This software as well as the software described in it is furnished under
**  license and may only be used or copied in accordance with the terms of the
**  license. The information in this file is furnished for informational use
**  only, is subject to change without notice, and should not be construed as
**  a commitment by Intel Corporation. Intel Corporation assumes no
**  responsibility or liability for any errors or inaccuracies that may appear
**  in this document or any software that may be provided in association with
**  this document. 
**  Except as permitted by such license, no part of this document may be 
**  reproduced, stored in a retrieval system, or transmitted in any form or by
**  any means without the express written consent of Intel Corporation. 
**
**  FILENAME:       xllp_I2S.c
**
**  PURPOSE: contains all primitive functions for Bulverde I2S register access 
**     and control
**                  
******************************************************************************/
#include "xllp_gpio.h"
#include "xllp_i2s.h"

/*
*******************************************************************************
*
* FUNCTION:         XllpI2sMInit
*
* DESCRIPTION:      Init for hardware setting gpio alt func and direction.  
*					Turning on the clock and the amp
*
* INPUT PARAMETERS: None
*
* RETURNS:          XLLP_BOOL_T
*
* GLOBAL EFFECTS:   None
*
* ASSUMPTIONS:
*
* CALLS:
*
* CALLED BY:		I2S_Test()
*
*
* PROTOTYPE:        XLLP_BOOL_T XllpI2sMInit(P_XLLP_I2S_T i2s_regs,P_XLLP_I2C_T i2c_regs, P_XLLP_CLKMGR_T clkMgr,
*						 P_XLLP_GPIO_T gpio, P_XLLP_BCR_T Bcr)
*        
*
* 
*******************************************************************************
*/
XLLP_BOOL_T XllpI2sMInit(P_XLLP_I2S_T i2s_regs,P_XLLP_I2C_T i2c_regs, P_XLLP_CLKMGR_T clkMgr,
						 P_XLLP_GPIO_T gpio, P_XLLP_BCR_T Bcr)
{
//  clearing the GPIO's value to write the correct value in
	gpio->GAFR0_U &= ~( XLLP_GPIO_AF_BIT_I2SBITCLK_IN_MASK | 
					   ( XLLP_GPIO_AF_BIT_I2S_SDATA_IN_MASK)|
	   				   ( XLLP_GPIO_AF_BIT_I2S_SDATA_OUT_MASK)|
	   				   ( XLLP_GPIO_AF_BIT_I2S_SYNC_MASK) );

	gpio->GAFR3_U &=   ~( XLLP_GPIO_AF_BIT_I2S_SYSCLK_MASK | XLLP_GPIO_AF_BIT_SCL_MASK |XLLP_GPIO_AF_BIT_SDA_MASK );

	gpio->GPDR0 |= (XLLP_GPIO_BIT_I2SBITCLK|XLLP_GPIO_BIT_I2S_SDATA_OUT|XLLP_GPIO_BIT_I2S_SYNC);
	gpio->GPDR0 &= ~XLLP_GPIO_BIT_I2S_SDATA_IN;
	gpio->GPDR3 |= (XLLP_GPIO_BIT_I2S_SYSCLK );

//  sets the alternate function to make the processor the master and the codec the slave
//  and to generate the bit clock output
	gpio->GAFR0_U |= ( ( XLLP_GPIO_AF_BIT_I2SBITCLK_OUT ) | 
					   ( XLLP_GPIO_AF_BIT_I2S_SDATA_IN )|
	   				   ( XLLP_GPIO_AF_BIT_I2S_SDATA_OUT )|
	   				   ( XLLP_GPIO_AF_BIT_I2S_SYNC) );

	gpio->GAFR3_U |=   ( XLLP_GPIO_AF_BIT_I2S_SYSCLK );

//  ensuring the I2S clock is on
	clkMgr->cken |= XLLP_CLKEN_I2S;

//  turning on the amp for output of sound
	Bcr->MISCWR2 &= ~XLLP_BCR_MISCWR2_LINE2_SPKROFF;

// initializing i2c bus 
    if(XllpI2cInit(i2c_regs, gpio, clkMgr, XLLP_I2C_SLAVE_ID))
    {	
        return(XLLP_TRUE);
    }  	

return(XLLP_FALSE);
}

XLLP_BOOL_T XllpI2sSInit(P_XLLP_I2S_T i2s_regs,P_XLLP_I2C_T i2c_regs, P_XLLP_CLKMGR_T clkMgr,
						 P_XLLP_GPIO_T gpio, P_XLLP_BCR_T Bcr)
{
//  this has not been tested yet 
return(XLLP_FALSE);
}