📄 xllp_ethernet.c
字号:
access.
Global Register Modified:
None.
Input Arguments:
XLLP_UINT8_T value - the value that will be written to the register
XLLP_UINT32_T offset - offset to the register
Output Arguments:
None
Return Value:
None
*******************************************************************************/
static
void XllpEthernetWriteByte(XLLP_UINT8_T value, XLLP_UINT32_T offset)
{
P_XLLP_VUINT8_T ioRegsP = (P_XLLP_VUINT8_T)XllpEthernetGetPointerToIORegistersBase(); // Get pointer to I/O space
*(ioRegsP + offset) = value;
}
/******************************************************************************
Function Name:
XllpEthernetDisplayTxStatus
Description:
This function displays the bit settings for the Transmit Status Word
Global Register Modified:
None.
Input Arguments:
XLLP_UINT8_T value - the value that will be written to the register
XLLP_UINT32_T offset - offset to the register
Output Arguments:
None
Return Value:
None
*******************************************************************************/
void XllpEthernetDisplayTxStatus(void)
{
XLLP_UINT16_T ephSR;
// Get the transmit status.
XllpEthernetSelectRegisterBank (BANK2);
XllpEthernetWriteWord(XLLP_LAN91C111_PTR_READ | XLLP_LAN91C111_PTR_AUTO_INCR, XLLP_LAN91C111_POINTER);
ephSR = XllpEthernetReadWord16(XLLP_LAN91C111_DATA_HIGH);
// Display the error bits.
if (ephSR & XLLP_LAN91C111_EPHSR_ERRORS)
{
DM_CwDbgPrintf(DM_CW_LAN91C111_1, " LAN91C111: Transmit Status: %x", ephSR);
}
if (ephSR & XLLP_LAN91C111_EPHSR_SNGL_COL)
{
DM_CwDbgPrintf(DM_CW_LAN91C111_1, " LAN91C111: Single Collision Detected");
}
if (ephSR & XLLP_LAN91C111_EPHSR_MUL_COL)
{
DM_CwDbgPrintf(DM_CW_LAN91C111_1, " LAN91C111: Multiple Collisions Detected");
}
if (ephSR & XLLP_LAN91C111_EPHSR_16COL)
{
DM_CwDbgPrintf(DM_CW_LAN91C111_1, " LAN91C111: 16 Collisions Reached");
}
if (ephSR & XLLP_LAN91C111_EPHSR_SQET)
{
DM_CwDbgPrintf(DM_CW_LAN91C111_1, " LAN91C111: Signal Quality Error");
}
if (ephSR & XLLP_LAN91C111_EPHSR_TX_DEFR)
{
DM_CwDbgPrintf(DM_CW_LAN91C111_1, " LAN91C111: Transmit Deferred");
}
if (ephSR & XLLP_LAN91C111_EPHSR_LATCOL)
{
DM_CwDbgPrintf(DM_CW_LAN91C111_1, " LAN91C111: Late Collision");
}
if (ephSR & XLLP_LAN91C111_EPHSR_LOST_CARR)
{
DM_CwDbgPrintf(DM_CW_LAN91C111_1, " LAN91C111: Lost Carrier");
}
if (ephSR & XLLP_LAN91C111_EPHSR_EXC_DEF)
{
DM_CwDbgPrintf(DM_CW_LAN91C111_1, " LAN91C111: Excessive Deferral");
}
if (ephSR & XLLP_LAN91C111_EPHSR_LINK_OK)
{
DM_CwDbgPrintf(DM_CW_LAN91C111_1, " LAN91C111: Link Test Failed");
}
if (ephSR & XLLP_LAN91C111_EPHSR_TX_UNRN)
{
DM_CwDbgPrintf(DM_CW_LAN91C111_1, " LAN91C111: Transmission Underrun");
}
}
/******************************************************************************
Function Name:
XllpEthernetGetRxIntFlag
Description:
This routine sets or cleares a receive interrupt status flag.
Global Register Modified:
None.
Input Arguments:
XLLP_BOOL_T rxIntFlag - a value that is used to set or clear the
receive interrupt status flag
Output Arguments:
None
Return Value:
None
*******************************************************************************/
static
void XllpEthernetSetRxIntFlag (XLLP_BOOL_T rxIntFlag)
{
RxFlag = rxIntFlag;
}
/******************************************************************************
Function Name:
XllpEthernetGetRxIntFlag
Description:
This routine reads a status of the receive interrupt flag, and can be
used by the test to monitor if the receive interrupt took place
Global Register Modified:
None.
Input Arguments:
None.
Output Arguments:
P_XLLP_UINT16_T rxIntStatus - the receive interrupt status flag
Return Value:
None
*******************************************************************************/
void XllpEthernetGetRxIntFlag (P_XLLP_UINT16_T rxIntStatus)
{
*rxIntStatus = RxFlag;
}
/******************************************************************************
Function Name:
XllpEthernetReadEEPROM
Description:
This routine reads a value from the EEPROM
Global Register Modified:
None.
Input Arguments:
XLLP_UINT16_T offset - Offset within the EEPROM to read.
Output Arguments:
None
Return Value:
None
*******************************************************************************/
static
XLLP_UINT16_T XllpEthernetReadEEPROM(XLLP_UINT16_T offset)
{
XLLP_UINT16_T lanReg; // Temporary holding register
XLLP_UINT32_T start, timebase = getTimebase();
XLLP_UINT32_T timeout = XLLP_LAN91C111_TO_EEPROM * timebase;
// Assume success.
loggedError = 0;
// Select Bank 2
XllpEthernetSelectRegisterBank (BANK2);
// Set the LAN91C111 pointer register to the specified EEPROM address.
XllpEthernetWriteWord(offset, XLLP_LAN91C111_POINTER);
// Select Bank 1
XllpEthernetSelectRegisterBank (BANK1);
// Read the Control Register.
lanReg = XllpEthernetReadWord(XLLP_LAN91C111_CONTROL);
// The LAN91C111 reads the Configuration, Base and Individual Address, and
// STORE writes the Configuration and Base registers. Also when set it will
// read the EEPROM and update relevant registers with its contents. This bit
// then Clears upon completing the operation.
lanReg |= (XLLP_LAN91C111_CTR_RELOAD | XLLP_LAN91C111_CTR_EEPROM);
// Store the data to EEPROM.
XllpEthernetWriteWord16(lanReg, XLLP_LAN91C111_CONTROL);
// Prepare for timeout by getting the initial time interval.
start = TimerRegBaseP->oscr0;
// Verify that the data was read successfully. This assumes Bank 1 has
// been selected from the previous operation.
while (1)
{
// Read the Control Register.
lanReg = XllpEthernetReadWord(XLLP_LAN91C111_CONTROL);
// Only interested in the STORE and RELOAD bits.
lanReg = lanReg & (XLLP_UINT16_T)(XLLP_LAN91C111_CTR_STORE | XLLP_LAN91C111_CTR_RELOAD);
// Complete when the STORE and RELOAD bits are cleared.
if (0 == lanReg)
{
break;
}
// Get the current time interval.
if ((getDelta(TimerRegBaseP, start)) > timeout)
{
DM_CwDbgPrintf(DM_CW_LAN91C111_1, " Timeout reading EEPROM");
LOGERROR(&loggedError,
ERR_L_LAN91C111, ERR_S_EEPROM, ERR_T_TIMEOUT,
0, 0, 0);
return (0);
}
}
// Read the EEPROM data and return.
return (XllpEthernetReadWord(XLLP_LAN91C111_GEN_PURPOSE));
}
/******************************************************************************
Function Name:
XllpEthernetWriteEEPROM
Description:
This routine provides access to the 64 x 16-bit EEPROM attached to the
LAN91C111.
Global Register Modified:
None.
Input Arguments:
XLLP_UINT16_T offset - Offset within the EEPROM to write.
XLLP_UINT16_T value - Value to write into EEPROM.
Output Arguments:
None
Return Value:
None
*******************************************************************************/
static
void XllpEthernetWriteEEPROM(XLLP_UINT16_T offset, XLLP_UINT16_T value)
{
XLLP_UINT16_T lanReg; // Temporary holding register
XLLP_UINT32_T start, timebase = getTimebase();
XLLP_UINT32_T timeout = XLLP_LAN91C111_TO_EEPROM * timebase;
// Assume success.
loggedError = 0;
// Select Bank 2
XllpEthernetSelectRegisterBank (BANK2);
// Set the LAN91C111 pointer register to the specified EEPROM address.
XllpEthernetWriteWord(offset, XLLP_LAN91C111_POINTER);
// Select Bank 1
XllpEthernetSelectRegisterBank (BANK1);
// Write the specified data to the EEPROM.
XllpEthernetWriteWord(value, XLLP_LAN91C111_GEN_PURPOSE);
// Read the Control Register. This assumes Bank1 is selected.
lanReg = XllpEthernetReadWord(XLLP_LAN91C111_CONTROL);
// The STORE LAN91C111 bit when set, stores the contents of all relevant
// registers in the serial EEPROM. This bit is cleared upon completing
// the operation.
//
// Note: When an EEPROM access is in progress the STORE and RELOAD bits
// will be read back as high. The remaining 14 bits of this registers will
// be invalid. During this time, attempted read/write operations, other
// than polling the EEPROM status, will NOT have any effect the internal
// registers. The CPU can resume accesses to the LAN91C111 after both bits
// are low. A worst case RELOAD operation initated by RESET or by software
// takes less than 750 usec in either mode.
lanReg |= (XLLP_LAN91C111_CTR_STORE | XLLP_LAN91C111_CTR_EEPROM);
// Store the data to EEPROM. This assumes Bank 1 is selected.
XllpEthernetWriteWord16(lanReg, XLLP_LAN91C111_CONTROL);
// Prepare for timeout by getting the initial time interval.
// start = ostCtxP->getTimer_fnp(ostCtxP);
start = TimerRegBaseP->oscr0;
// Verify that the data was read successfully. This assumes Bank 1 has
// been selected from the previous operation.
while (1)
{
// Read the Control Register.
lanReg = XllpEthernetReadWord(XLLP_LAN91C111_CONTROL);
// Only interested in the STORE and RELOAD bits.
lanReg &= (XLLP_LAN91C111_CTR_STORE | XLLP_LAN91C111_CTR_RELOAD);
// Complete when the STORE and RELOAD bits are cleared.
if (0 == lanReg)
{
break;
}
// Get the current time interval.
if ((getDelta(TimerRegBaseP, start)) > timeout)
{
DM_CwDbgPrintf(DM_CW_LAN91C111_1, " Timeout writing EEPROM");
LOGERROR(&loggedError,
ERR_L_LAN91C111, ERR_S_EEPROM, ERR_T_TIMEOUT,
0, 0, 0);
return;
}
}
}
/******************************************************************************
Function Name:
XllpEthernetGetEEPROMMACAddress
Description:
This routine return the MAC address stored in the EEPROM.
Global Register Modified:
None
Input Arguments:
P_XLLP_UINT16_T macAddressP - pointer to an array of tree 16-bit words
Output Arguments:
None
Return Value:
XLLP_UINT32_T - error code in case of failure reading the EEPROM, zero if success.
*******************************************************************************/
XLLP_UINT32_T XllpEthernetGetEEPROMMACAddress(P_XLLP_UINT16_T macAddressP)
{
// Assume success.
loggedError = 0;
DM_CwDbgPrintf(DM_CW_LAN91C111_0, " Reading MAC address from EEPROM");
// WARNING: This routine changes the selected Bank register.
macAddressP[0] = XllpEthernetReadEEPROM(EEPROM_MAC_OFFSET_1);
if (loggedError)
{
DM_CwDbgPrintf(DM_CW_LAN91C111_1, " Timeout reading EEPROM");
// Error reading the EEPROM.
LOGERROR(&loggedError,
ERR_L_LAN91C111, ERR_S_BAD_MAC, ERR_T_UNEXPECTED,
macAddressP[0], 0, 0);
return (loggedError);
}
macAddressP[1] = XllpEthernetReadEEPROM(EEPROM_MAC_OFFSET_2);
if (loggedError)
{
DM_CwDbgPrintf(DM_CW_LAN91C111_1, " Timeout reading EEPROM");
// Error reading the EEPROM.
LOGERROR(&loggedError,
ERR_L_LAN91C111, ERR_S_BAD_MAC, ERR_T_UNEXPECTED,
macAddressP[1], 0, 0);
return (loggedError);
}
macAddressP[2] = XllpEthernetReadEEPROM(EEPROM_MAC_OFFSET_3);
if (loggedError)
{
DM_CwDbgPrintf(DM_CW_LAN91C111_1, " Timeout reading EEPROM");
// Error reading the EEPROM.
LOGERROR(&loggedError,
ERR_L_LAN91C111, ERR_S_BAD_MAC, ERR_T_UNEXPECTED,
macAddressP[2], 0, 0);
return (loggedError);
}
DM_CwDbgPrintf(DM_CW_LAN91C111_0,
" EEPROM LAN91C111 MAC Address: %02X-%02X-%02X-%02X-%02X-%02X",
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