📄 xllp_pm_sleepcontext.h
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#ifndef __XLLP_PM_SLEEPCONTEXT_H__
#define __XLLP_PM_SLEEPCONTEXT_H__
/******************************************************************************
**
** INTEL CONFIDENTIAL
** Copyright 2000-2003 Intel Corporation All Rights Reserved.
**
** The source code contained or described herein and all documents
** related to the source code (Material) are owned by Intel Corporation
** or its suppliers or licensors. Title to the Material remains with
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** copyright and trade secret laws and treaty provisions. No part of the
** Material may be used, copied, reproduced, modified, published, uploaded,
** posted, transmitted, distributed, or disclosed in any way without Intel抯
** prior express written permission.
**
** No license under any patent, copyright, trade secret or other intellectual
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** delivery of the Materials, either expressly, by implication, inducement,
** estoppel or otherwise. Any license under such intellectual property rights
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**
** FILENAME: xllp_Pm_SleepContext.h
**
** PURPOSE: Contains all XLLP PM sleep specific macros, typedefs, and
** prototypes.
**
******************************************************************************/
//#define XLLP_PM_SLEEP_SKIP_BLR_SAVES
//
// NOTE: This file must be kept in sync with xllp_Pm_SleepContext.inc
//
// For sanity check in checksum; increased because of external chksm capability
#define XLLI_MAX_SLEEP_DATA_COUNT 0x400
#define XLLP_STORE_WMX_REGS_BYTES 156
#define XLLP_IM_BANK_SIZE 0x10000
//
// These counts are needed for the C-level definition of the sleep data save
// area structure, so they cannot be determined dynamically.
//
// std reglist was 68, lost IMPMCR to special processing
#define XLLP_PM_SLP_STD_REGLIST_CNT_NON_BLR 63 // Non-BLR count for S-R
#ifdef BSP_MAINSTONE_II
#define XLLP_PM_SLP_STD_REGLIST_CNT_BLR 9 // Board Level Register Count for S-R
#endif // def BSP_MAINSTONE_II
#ifndef XLLP_PM_SLEEP_SKIP_BLR_SAVES
#define XLLP_PM_SLEEP_STD_REGLIST_CNT (XLLP_PM_SLP_STD_REGLIST_CNT_NON_BLR + \
XLLP_PM_SLP_STD_REGLIST_CNT_BLR) // Standard reg list size
#else
#define XLLP_PM_SLEEP_STD_REGLIST_CNT XLLP_PM_SLP_STD_REGLIST_CNT_NON_BLR // Standard reg list size
#endif // #else of #ifndef XLLP_PM_SLEEP_SKIP_BLR_SAVES
//#define XLLP_PM_SLEEP_STD_REGLIST_CNT 67 // Standard reg list size
#define XLLP_PM_SLEEP_DEEP_REGLIST_CNT 0 // Deep sleep reg list size
#define XLLP_PM_SLEEP_OPT_REGLIST_CNT 0 // Optional list size
typedef void (* P_XLLP_VOID_FN_T) (void);
/////////////////////////////////////////////////////////////////////////
//
// Definition of parameter structure used for the register lists needed
// by XllpPmEnterSleep()
//
typedef struct XLLP_PM_ADDR_WITH_MASK_S
{
P_XLLP_VUINT32_T regAddr; // Virtual address of interest
XLLP_UINT32_T mask; // AND mask to zero reserved bits from address
} XLLP_PM_ADDR_WITH_MASK_T, * P_XLLP_PM_ADDR_WITH_MASK_T;
typedef enum
{
MODE_SLEEP = 0,
MODE_DEEP_SLEEP,
MODE_STANDBY
} XLLP_PM_POWER_MODE;
/////////////////////////////////////////////////////////////////////////
//
// Definition of parameter structure needed by XllpPmEnterSleep()
//
// typedef *P_XLLP_PM_ENTER_SLEEP_PARAMS_T P_XLLP_PM_ENTER_SLEEP_PARAMS_T;
typedef struct XLLP_PM_ENTER_SLEEP_PARAMS_S
{
//
// Begin status reporting fields:
// Should be zero-initialized for non-sleep resets.
//
// SW-based sleep or deep sleep, sleep
XLLP_UINT32_T SleepType ; // converted to deep by a power fault (future)
XLLP_UINT32_T r10 ; // Contents of r10 from startup code: info only. (future)
// Wakeup reason status info
XLLP_UINT32_T PEDR;
XLLP_UINT32_T PKSR;
//
// Informational fields
//
XLLP_UINT32_T SleepDataAreaPA; // Physical addr of sleep data storage
// Virtual addr of sleep data storage
// P_XLLP_PM_SLEEP_SAVE_DATA_T SleepDataAreaVA;
struct XLLP_PM_SLEEP_SAVE_DATA_S *SleepDataAreaVA;
// Input: Temporary stack area used in restoring Internal Memory
// if stack is in Internal Memory.
P_XLLP_UINT32_T pTmpStack;
// Input: Counter register address
P_XLLP_UINT32_T OSCR_Addr;
// Output: Time for sleep beginning
XLLP_UINT32_T BeginSleepTime;
// Input: Pointer to time for sleep end
P_XLLP_UINT32_T Addr_EndSleepTime;
// Output: Time for sleep end
XLLP_UINT32_T EndSleepTime;
// Output: Time for wake beginning
XLLP_UINT32_T BeginWakeTime;
// Output: Time for wake end
XLLP_UINT32_T EndWakeTime;
// Output: Change in time during wake
XLLP_UINT32_T ChangeOfTime;
//
// Begin control fields
// Boolean, bit-mapped control options:
// Flush mini-data cache; (possible future: don't know how to do this)
// Restore (always stored) defined register values from CP 14 (future: currently always restored)
// Mask interrupts in the board registers before suspend (future: currently not masked)
// Don't restore OST registers if pwr_i2c was disabled(futures)
XLLP_UINT32_T SleepOptions; // Not initially used
XLLP_UINT32_T LowPowerModeSelect;
// End of fields used by ASM language
// OS-specific function pointers. Some are optional.
// Virtual address of OS-specific function to flush all caches,
// etc. Mandatory.
P_XLLP_VOID_FN_T pOsSpecificFlushFn;
// The two following fields are optional OS-specific functions
// to be called during the context saving or restoration code
// Zero in a field will not be invoked
// Any non-zero value is treated as a valid function pointer and
// called.
// Call after context saved but before sleep
P_XLLP_VOID_FN_T pOsSuspendOptionalFn;
// Call when most context is restored but before final
// restoration of processor mode in which it is called.
P_XLLP_VOID_FN_T pOsResumeOptionalFn;
// CKEN state during sleep
XLLP_UINT32_T CKEN_msk;
XLLP_UINT32_T CKEN_vals;
// Sleep and wakeup behavior control, general
XLLP_UINT32_T PCFR_msk;
XLLP_UINT32_T PCFR_vals;
XLLP_UINT32_T PSLR_msk;
XLLP_UINT32_T PSLR_vals;
// GPIO Sleep State Control
// Control enable masks (0=use GPLR value; 1=use value from this param)
XLLP_UINT32_T PGSR0_msk;
XLLP_UINT32_T PGSR1_msk;
XLLP_UINT32_T PGSR2_msk;
XLLP_UINT32_T PGSR3_msk; // 121..127 reserved.
// Values to set.
XLLP_UINT32_T PGSR0_vals;
XLLP_UINT32_T PGSR1_vals;
XLLP_UINT32_T PGSR2_vals;
XLLP_UINT32_T PGSR3_vals; // 121..127 reserved.
// Wakeup Enable Control
XLLP_UINT32_T PWER;
XLLP_UINT32_T PRER;
XLLP_UINT32_T PFER;
XLLP_UINT32_T PKWR;
// Address of four 64Kb buffers in SDRAM to store internal memory
// Optional: 0x00 means don't save it.
// If saved, will be restored. (Note: contents lost during sleep.)
P_XLLP_UINT32_T StoreAddrForIntlMem_0; // during sleep.
P_XLLP_UINT32_T StoreAddrForIntlMem_1; // during sleep.
P_XLLP_UINT32_T StoreAddrForIntlMem_2; // during sleep.
P_XLLP_UINT32_T StoreAddrForIntlMem_3; // during sleep.
// Virtual address of internal memory
P_XLLP_UINT32_T IntlMemVA_0;
P_XLLP_UINT32_T IntlMemVA_1;
P_XLLP_UINT32_T IntlMemVA_2;
P_XLLP_UINT32_T IntlMemVA_3;
P_XLLP_PM_ADDR_WITH_MASK_T pOptionalRegList;
XLLP_UINT32_T privateRegListCount;
P_XLLP_VUINT32_T pPrivateRegListStorage;
// Note: Total checksummed space limited by XLLI_MAX_SLEEP_DATA_COUNT
XLLP_UINT32_T extendedChecksumWordCount;
} XLLP_PM_ENTER_SLEEP_PARAMS_T, *P_XLLP_PM_ENTER_SLEEP_PARAMS_T;
/////////////////////////////////////////////////////////////////////////
//
// The C-level definition of the sleep data save area structure.
//
typedef struct XLLP_PM_SLEEP_SAVE_DATA_S *P_XLLP_PM_SLEEP_SAVE_DATA_T ;
typedef void (* P_XLLP_VOID_P_SLEEP_DATA_FN_T) (P_XLLP_PM_SLEEP_SAVE_DATA_T);
typedef struct XLLP_PM_SLEEP_SAVE_DATA_S
{
XLLP_UINT32_T checksum ; // Must be first.
// Word count must be second.
// (total number of 32-bit words stored, excluding only checksum))
XLLP_UINT32_T SleepAreaWordCount ; // Needed for checksum after reset.
P_XLLP_VOID_P_SLEEP_DATA_FN_T AwakeAddr;
struct XLLP_PM_SLEEP_SAVE_DATA_S *pSleepDataArea;
P_XLLP_PM_ENTER_SLEEP_PARAMS_T pSleepParam;
// ARM* registers and most coprocessors must be processed locally
// using assembly language.
// Most ARM* registers stored on the stacks of their processor modes.
XLLP_UINT32_T ENTRY_CPSR;
XLLP_UINT32_T ENTRY_SP;
XLLP_UINT32_T ENTRY_SPSR;
XLLP_UINT32_T SYS_SP;
XLLP_UINT32_T FIQ_SP;
XLLP_UINT32_T ABT_SP;
XLLP_UINT32_T IRQ_SP;
XLLP_UINT32_T UND_SP;
XLLP_UINT32_T SVC_SP;
// Coprocessor-accessed values
// Saved Coprocessor regs other than CP0+1 (includes MMU values)
XLLP_UINT32_T Cp15_ACR_MMU;
XLLP_UINT32_T Cp15_AUXCR_MMU;
XLLP_UINT32_T Cp15_TTBR_MMU;
XLLP_UINT32_T Cp15_DACR_MMU;
XLLP_UINT32_T Cp15_PID_MMU;
XLLP_UINT32_T Cp15_CPAR;
// Added for IM and deep sleep support, needed by ASM code.
// Temporary stack area used in restoring Internal Memory
P_XLLP_UINT32_T pTmpStack;
// Need impmcr info here in case early restore of IM.
P_XLLP_UINT32_T impmcr_va ;
XLLP_UINT32_T impmcr ;
// Internal Memory store address
P_XLLP_UINT32_T StoreAddrForIntlMem_0; // during sleep.
P_XLLP_UINT32_T StoreAddrForIntlMem_1; // during sleep.
P_XLLP_UINT32_T StoreAddrForIntlMem_2; // during sleep.
P_XLLP_UINT32_T StoreAddrForIntlMem_3; // during sleep.
// Virtual address of internal memory
P_XLLP_UINT32_T IntlMemVA_0;
P_XLLP_UINT32_T IntlMemVA_1;
P_XLLP_UINT32_T IntlMemVA_2;
P_XLLP_UINT32_T IntlMemVA_3;
// Counter register address
P_XLLP_UINT32_T OSCR_Addr;
// OSCR value restored if PI domain is powered down
XLLP_UINT32_T OSCR_val;
// Begin time of wakeup
XLLP_UINT32_T BeginWakeTime;
//
// Everything below this point can be processed in C language code
//
// Memory mapped peripherals not in register list
// because of special handling or order of operations
XLLP_UINT32_T GPLR0;
XLLP_UINT32_T GPLR1;
XLLP_UINT32_T GPLR2;
XLLP_UINT32_T GPLR3;
XLLP_UINT32_T CKEN;
// Storage array for CP0 + CP1.
// Needs assembly language, but there is a C-callable function for it.
XLLP_UINT32_T IWMMXTRegs[XLLP_STORE_WMX_REGS_BYTES/4];
// Storage for register lists.
// Begin storage for registers from standard peripheral register list
XLLP_VUINT32_T StandardRegListStore [XLLP_PM_SLEEP_STD_REGLIST_CNT];
#if XLLP_PM_SLEEP_DEEP_REGLIST_CNT
// Begin storage for registers from deep sleep peripheral register list
XLLP_VUINT32_T DeepSleepRegListStore [XLLP_PM_SLEEP_DEEP_REGLIST_CNT];
#endif // XLLP_PM_SLEEP_DEEP_REGLIST_CNT
// Plus pointer to room for some number of registers
// as desired by client system.
// Begin storage for registers from optional register list.
P_XLLP_VUINT32_T pPrivateRegListStorage;
P_XLLP_PM_ADDR_WITH_MASK_T pOptionalRegList;
XLLP_UINT32_T privateRegListCount;
XLLP_UINT32_T extendedChecksumWordCount;
} XLLP_PM_SLEEP_SAVE_DATA_T;
///////////////////////////////////////////////////////////////////
//
// External declarations for variables and public functions
//
extern XLLP_PM_ADDR_WITH_MASK_T XllpPmSleepStdRegList [XLLP_PM_SLEEP_STD_REGLIST_CNT];
#if XLLP_PM_SLEEP_DEEP_REGLIST_CNT
extern XLLP_PM_ADDR_WITH_MASK_T XllpPmSleepDeepRegList [XLLP_PM_SLEEP_DEEP_REGLIST_CNT];
#endif // XLLP_PM_SLEEP_DEEP_REGLIST_CNT
////////////////////////////////////////////////
//
// Function prototypes
//
#ifdef __cplusplus
extern "C" {
#endif
extern void XllpPmEnterSleep (P_XLLP_PM_ENTER_SLEEP_PARAMS_T);
extern void XllpPmRestoreAfterSleep (P_XLLP_PM_SLEEP_SAVE_DATA_T);
extern XLLP_UINT32_T XllpPmChecksumSleepDataVi (P_XLLP_UINT32_T,
XLLP_UINT32_T);
#ifdef __cplusplus
}
#endif
#endif // __XLLP_PM_SLEEPCONTEXT_H__
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