📄 cfwbvd1.c
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/*++
THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
PARTICULAR PURPOSE.
Copyright (c) 1995, 1996, 1997 Microsoft Corporation
--*/
/*
** INTEL CONFIDENTIAL
** Copyright 2000-2003 Intel Corporation All Rights Reserved.
**
** The source code contained or described herein and all documents
** related to the source code (Material) are owned by Intel Corporation
** or its suppliers or licensors. Title to the Material remains with
** Intel Corporation or its suppliers and licensors. The Material contains
** trade secrets and proprietary and confidential information of Intel
** or its suppliers and licensors. The Material is protected by worldwide
** copyright and trade secret laws and treaty provisions. No part of the
** Material may be used, copied, reproduced, modified, published, uploaded,
** posted, transmitted, distributed, or disclosed in any way without Intel抯
** prior express written permission.
**
** No license under any patent, copyright, trade secret or other intellectual
** property right is granted to or conferred upon you by disclosure or
** delivery of the Materials, either expressly, by implication, inducement,
** estoppel or otherwise. Any license under such intellectual property rights
** must be express and approved by Intel in writing.
*/
/*++
Module Name: $Workfile: cfwBvd1.c $
Abstract:
This file implements the NK kernel interfaces for firmware interrupt
support on the XSC1/Bulverde platforms.
Notes:
--*/
#include <memory.h>
#include "windows.h"
#include "nkintr.h"
#include "oalintr.h"
#include "drv_glob.h"
#include "bvd1.h"
#include "bvd1bd.h"
#include "WCEpalette.h"
#include "bcr.h"
#include "timer.h"
#include "pmu.h"
#include "isrdefs.h"
#include "blrbits.h"
#include "PCCardSocket_Globals.h"
#include "pmgr.h"
#ifdef USING_XSCALEBROWSER
#include "dbgioctl.h"
#endif // USING_XSCALEBROWSER
/*
@doc EXTERNAL KERNEL HAL
@module cfwsarm.c - HW Support |
OEM support Functions for the Windows CE XSC1/SA11X1 Platforms.
@xref <f OEMInit> <f OEMInterruptEnable> <f OEMInterruptDisable>
<f OEMInterruptDone> <l HAL Overview.Windows CE Kernel OEM Interface>
@topic Windows CE Kernel OEM Interface |
This defines the HAL layer - OEM and platform dependent pieces of
code which we expect the OEM to deliver to us. There are three pieces
of OEM deliverable code - the bootstrap loader & monitor (for
debugging), the HAL portions which are interfaces between the kernel
and the firmware, and the driver interface. This topic covers just
the HAL portion.
The philosophy is to keep the HAL layer as simple as possible. The
HAL should not be confused with the machine or CPU independence. HAL
is specific for a particular CPU and platform. It includes interfaces
for the following devices:<nl>
Real Time Clock<nl>
Interval Timer (used for the scheduler operation) <nl>
Interrupt handlers and support <nl>
Note that it does not include abstractions for devices like the DMA
controller etc. since the kernel does not use one. Also note that the
list could change for different CPU's and platforms - for instance,
some chips might include a lot of peripheral devices (like the
interval timer) on the CPU chip itself, removing the need for a
separate interface for them.
The interfaces for the real time clock and interval timer are still
being developed. But they should in general be extremely simple and
straightforward. For details on the interrupt support model in the
kernel look at <l Interrupt Support Overview.Kernel Interrupt Support>
@xref <l Interrupt Support Overview.Kernel Interrupt Support>
<f OEMInit> <f OEMInterruptEnable> <f OEMInterruptDisable>
<f OEMInterruptDone> <f HookInterrupt>
*/
/* EXTERNAL DECLARATIONS */
extern DWORD idleconv; // Used for determining CPU utilization
extern void HalTimerInit(void);
extern void TURN_ON_BTB(void);
extern void DVM_Init(void);
extern void InitDebugEther(void);
#ifdef USING_COPROCSUPPORT
// Function to enable the CP0 access bits in CP15
extern void ENABLE_COPROC_ACCESS(void);
// Function pointers for Saving/Restoring CoProc Register
extern void (* pOEMInitCoProcRegisterSavedArea) (LPBYTE pArea);
extern void (* pOEMRestoreCoProcRegister) (LPBYTE);
extern void (* pOEMSaveCoProcRegister)(LPBYTE);
// Saving/Restoring CoProc Register Prototypes
void OEMInitCoProcRegisterSavedArea(LPBYTE pArea);
void OEMSaveCoProcRegister( LPBYTE pArea );
void OEMRestoreCoProcRegister( LPBYTE pArea);
// Prototypes for Assembly routines used for saving/restoring CoProc Registers
extern void BVDSaveCoProcessors(LPBYTE pArea);
extern void BVDRestoreCoProcessors(LPBYTE pArea);
extern DWORD cbNKCoProcRegSize;
extern DWORD fNKSaveCoProcReg;
#endif // USING_COPROCSUPPORT
#ifdef PSM_LEGACY_REG_ENABLED
/* IPSM Registry Declarations */
/***** Comment out for Stinger Testing of HAL IOCTL************/
extern BOOL REG_FlashInitialize(void);
extern BOOL WriteRegistryToOEM(DWORD dwFlags, LPBYTE lpData, DWORD cbData);
extern DWORD ReadRegistryFromOEM(DWORD dwFlags, LPBYTE lpData, DWORD cbData);
extern DWORD (*pReadRegistryFromOEM)(DWORD dwFlags, LPBYTE lpData, DWORD cbData) = ReadRegistryFromOEM;
extern BOOL (*pWriteRegistryToOEM)(DWORD dwFlags, LPBYTE lpData, DWORD cbData) = WriteRegistryToOEM;
#endif //PSM_LEGACY_REG_ENABLED
#if (WINCEOSVER >= 420)
extern BOOL (* pOEMIsProcessorFeaturePresent)(DWORD);
BOOL OEMIsProcessorFeaturePresent(DWORD dwProcessorFeature);
#else
extern DWORD CEProcessorType;
#endif
/* GLOBALS */
typedef volatile WORD *PVWORD; /* pointer to a volatile word */
typedef volatile DWORD *PVDWORD; /* pointer to a volatile dword */
/* ************************************************************************* */
/* ************************************************************************* */
/*
@func void | OEMInit | Initialize Hardware Interfaces
@rdesc none
@comm OEMInit is called by the kernel after it has performed minimal
initialization. Interrupts are disabled and the kernel is not
ready to handle exceptions. The only kernel service available
to this function is <f HookInterrupt>. This should be used to
install ISR's for all the hardware interrupts to be handled by
the firmware. Note that ISR's must be installed for any interrupt
that is to be routed to a device driver - otherwise the
<f InterruptInitialize> call from the driver will fail.
*XSCALE NOTE: HookInterrupt() is not needed because we only
have a single IRQ input. ALL IRQ's are routed to OEMInterruptHandler().
@xref <l Overview.Windows CE Kernel OEM Interface> <f HookInterrupt>
<f InterruptInitialize>
PreDetermined States:
1) Interrupt Controller: ICMR cleared (masked all bits),
ICLR Cleared (routing all Ints to IRQ)
2) GPIO: see \kernel\hal\GPIO_readme.txt
*/
void OEMInit()
{
volatile PDRIVER_GLOBALS v_pDriverGlobals = (volatile PDRIVER_GLOBALS)DRIVER_GLOBALS_U_VIRTUAL;
volatile XLLP_GPIO_T *v_pGPIOReg = (volatile XLLP_GPIO_T *) GPIO_BASE_U_VIRTUAL;
volatile XLLP_INTC_T *v_pICReg = (volatile XLLP_INTC_T *) INTC_BASE_U_VIRTUAL;
volatile XLLP_CLKMGR_T *v_pClkReg = (volatile XLLP_CLKMGR_T *)CLK_BASE_U_VIRTUAL;
#if 0 //hzh
#ifdef BSP_MAINSTONE
volatile BLR_REGS *v_pBLReg = (volatile BLR_REGS *) FPGA_REGS_BASE_U_VIRTUAL;
#endif
#endif
volatile MEMC_STRUCT *v_pMEMC = (volatile MEMC_STRUCT *) MEMC_BASE_U_VIRTUAL;
P_XLLP_VUINT32_T pIPRReg,
pIPRReg2;
int i,j;
#ifdef USING_XSCALEBROWSER
static BYTE TraceBuffer[20][268]; // space for 20 captures
#endif
// Turn on Branch Target Buffer
TURN_ON_BTB(); // ASM routine in cpregXsc1.s
// Configure the Arbiter Control Register so that LCD has higher priority than the DMA and GASKET.
// Park at the GASKET. LCD has weight 15, DMA has weight 1, and GASKET has weight 2.
//v_pMEMC->arb_cntl = 0x04000F12;
v_pMEMC->arb_cntl = 0x400002F1; //park at CI, Gasket 1 < LCD weight 2 < DMA 15
#if (WINCEOSVER < 420)
//
// To maintain backward compatibility with legacy SA SW,
// overwrite XScale CPUid in CEProcessorType with SA for the
// 3_0 based OSs.
//
CEProcessorType=PROCESSOR_STRONGARM;
#endif
//
// Initialize device priorities
// This must be done before any interrupts are unmasked.
//
pIPRReg = &(v_pICReg->ipr[0]);
pIPRReg2 = &(v_pICReg->ipr2[0]);
for (i=0; i<32; i++)
{
pIPRReg[i] = DevPriorities[i];
}
for (j=0; j<2; j++, i++)
{
pIPRReg2[j] = DevPriorities[i];
}
//
// Set DIM, the only bit in the ICCR.
// The effect is that only enabled and unmasked
// interrupts bring the processor out of IDLE mode.
//
v_pICReg->iccr = ICCR_DIM;
/*
* Initialize driver globals area
*/
memset((PVOID)DRIVER_GLOBALS_ZEROINIT_START, 0, (sizeof(DRIVER_GLOBALS) - (sizeof(UNINIT_MISC_GLOBALS) + sizeof(DBG_ETH_GLOBALS))) );
/*
* initialize these because they are part of the non-zero init crew used by the kernel
*/
v_pDriverGlobals->uninit_misc.offButton=0;
v_pDriverGlobals->uninit_misc.USBCableEvent=0;
v_pDriverGlobals->uninit_misc.CPUSteppingID = XSC1GetCPUId();
#ifdef USING_COPROCSUPPORT
// Setup Saving & Restoring of CoProcessor Registers
//Assembly routine to turn on CP0 access bit located in cpregXsc1.s
// NOTE: If access bits are not enabled, when saving/restoring/accessing
// CP0, will get an undefined exception!!!!
// Note: The save/restore functions assume bit is enabled, a user can
// create an IOCTL that can disable it and cause undefined exceptions!!
ENABLE_COPROC_ACCESS();
//Set the buffer size to 8 bytes, to accomidate 16X64-bits + 6X32-bits (with alignment)
cbNKCoProcRegSize = 156; //Add 4 bytes to save off flags (keeping alignment)
fNKSaveCoProcReg = 1;
// Now setup the callback pointers
pOEMInitCoProcRegisterSavedArea = OEMInitCoProcRegisterSavedArea;
pOEMRestoreCoProcRegister = OEMRestoreCoProcRegister;
pOEMSaveCoProcRegister = OEMSaveCoProcRegister;
#endif //USING_COPROCSUPPORT
#if (WINCEOSVER >= 420)
//
// Initialize other OEM callback pointers
//
pOEMIsProcessorFeaturePresent = OEMIsProcessorFeaturePresent;
#endif
#if 0 //hzh
#ifdef BSP_MAINSTONE
/*
* Enable USB Cable detection interrupts
*/
v_pBLReg->int_msk_en |= USBCD_MASK;
/*
* Clear all the bits in the FPGA Int Set Clear register since they
* are all undefined at power up.
*/
v_pBLReg->int_set_clr = 0;
/*
* Enable GPIO 0 for falling edge (Active Low)
* to signal the FPGA interrupts.
*/
GEDR_GPIO0_EDGE_CLR(v_pGPIOReg->GFER0);
INTC_GPIO0_INT_EN (v_pICReg->icmr);
#endif
#else
v_pMEMC->msc0 = (v_pMEMC->msc0&0xffff)|0x94690000;
v_pMEMC->msc1 = 0xB8C9B8DC;
v_pGPIOReg->GRER0 &= ~1; //GPIO0
v_pGPIOReg->GFER0 &= ~1; //GPIO0
v_pGPIOReg->GEDR0 = 1; //GPIO0
v_pGPIOReg->GRER0 &= ~2; //GPIO1
v_pGPIOReg->GFER0 &= ~2; //GPIO1
v_pGPIOReg->GEDR0 = 2; //GPIO0
v_pGPIOReg->GPDR0 &= ~(1<<14); //GPIO14
v_pGPIOReg->GAFR0_L &= ~(3<<28);//GPIO14
v_pGPIOReg->GRER0 &= ~(1<<14); //GPIO14
v_pGPIOReg->GFER0 &= ~(1<<14); //GPIO14
v_pGPIOReg->GEDR0 = 1<<14; //GPIO14
v_pGPIOReg->GPDR0 &= ~(1<<19); //GPIO19
v_pGPIOReg->GAFR0_U &= ~(3<<6); //GPIO19
v_pGPIOReg->GRER0 &= ~(1<<19); //GPIO19
v_pGPIOReg->GFER0 &= ~(1<<19); //GPIO19
v_pGPIOReg->GEDR0 = 1<<19; //GPIO19
v_pICReg->icmr |= 6<<8; //Enabel GPIO1, GPIO2_xx irq
///
///
#endif
// init AC97 GPIO flags
v_pDriverGlobals->ac97.GpioIsConfigured = 0;
#ifdef IMGEBOOT
// Initialize Ethernet Debugging
InitDebugEther(); // enable KITL and debugger if desired.
#endif
// Perform default init of sleep params once.
PmgrInitSleepParam ((PVOID)SLEEP_SAVE_U_VIRTUAL,XLLP_FALSE);
(void) PmgrSetValue((PVOID)SLEEP_SAVE_U_VIRTUAL,
PMDS_SLEEP_TYPE,
SLEEP_TYPE_STANDARD);
#ifdef PSM_LEGACY_REG_ENABLED
/* PSM: Initialize the Registry library for OEM Reg handling */
if (REG_FlashInitialize() == TRUE)
{
pReadRegistryFromOEM = ReadRegistryFromOEM;
pWriteRegistryToOEM = WriteRegistryToOEM;
}
else
{
pReadRegistryFromOEM = NULL;
pWriteRegistryToOEM = NULL;
}
/* End of PSM Registry Init */
#endif //PSM_LEGACY_REG_ENABLED
// Init & Enable Timer and Timer Interrupts
HalTimerInit();
#ifdef USING_XSCALEBROWSER
XSCBwrInitExecutionTrace(TraceBuffer, sizeof(TraceBuffer));
#endif //USING_XSCALEBROWSER
#ifdef USING_DVM
v_pDriverGlobals->uninit_misc.CPUUtilization = 0;
v_pDriverGlobals->uninit_misc.idletime = 0; //remove next time
DVM_Init();
#endif
#ifndef IMGNOKITL
// Initialize Ethernet Debugging
InitDebugEther(); // enable KITL and debugger if desired.
#endif
//WRITE_HEX_LEDS(0x00000000);
}
/* ************************************************************************* */
/*
@func BOOL | OEMInterruptEnable | Enable a hardware interrupt
@rdesc Returns TRUE if valid interrupt ID or FALSE if invalid ID.
@comm This function is called by the Kernel when a device driver
calls InterruptInitialize(). The system is not preemptible when this
function is called.
@xref <l Overview.Windows CE Kernel OEM Interface> <f InterruptInitialize>
*/
BOOL OEMInterruptEnable (
DWORD idInt, // @parm Interrupt ID to be enabled. See
// <l Interrupt ID's.Interrupt ID's> for a list of possble values.
LPVOID pvData, // @parm ptr to data passed in in the <f InterruptInitialize> call
DWORD cbData // @parm Size of data pointed to be <p pvData>
)
{
volatile PDRIVER_GLOBALS v_pDriverGlobals = (volatile PDRIVER_GLOBALS)DRIVER_GLOBALS_U_VIRTUAL;
volatile XLLP_GPIO_T *v_pGPIOReg;
volatile XLLP_INTC_T *v_pICReg;
volatile XLLP_OST_T *v_pOSTReg;
BOOL bRet = TRUE;
#if 0 //hzh
#ifdef BSP_MAINSTONE
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