pmgrxsc1.s

Xcale270Bsp包,wince平台

;
;      TITLE("XSC1 Firmware Initialization")
;++
;
; Copyright (c) 1999, 2002  Intel Corporation
;
; $Modtime: $
;--


    OPT     2                               ; disable listing

    INCLUDE kxarm.h
    INCLUDE bvd1.inc
    INCLUDE bvd1bd.inc
    INCLUDE xlli_Bulverde_defs.inc

    IF BSP_MAINSTONE = "1"
    INCLUDE Mainstone.mac
    ENDIF

	
    ;OPT     128                            ; disable listing of macro expansions
    OPT     1                               ; reenable listing

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    TEXTAREA


;
; XSC1GetSPSR - Returns the Saved Program Status Register
;
; This routine is called by the IRQ interrupt handler when
; PMU is active and capturing data
;
;       Uses    r0 returns SPSR

    LEAF_ENTRY XSC1GetSPSR

    mrs     r0, SPSR
      IF Interworking :LOR: Thumbing
         bx  lr
      ELSE
         mov  pc, lr          ; return
      ENDIF

;; End of XSC1GetSPSR()
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;
; CPUEnterIdle - system idle
;
; NOTE: Implementation of OEMIdle moved to OEMIdle.c
;
; This routine is called by OEMIdle in order to enter IDLE mode
;
;
;       Entry   Interrupts disabled
;       Exit    none
;       Uses    r0
;

    LEAF_ENTRY CPUEnterIdle

    ldr     r0, =0x01                       ; 1 = Idle Mode 
    mcr     p14, 0, r0, c7, c0, 0           ; Enter Idle mode
      IF Interworking :LOR: Thumbing
         bx  lr
      ELSE
         mov  pc, lr          ; return
      ENDIF

;; End of CPUEnterIdle()
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;;
;; UINT32  pmDisableInts (void)
;;
;;  Disable IRQ and FIQ interrupts by setting the I+F bits in the CPSR.
;;  Returns (R0): the state of the I+F bits before they were set 
;;

    LEAF_ENTRY pmDisableInts

    mov     r1, #(xlli_CPSR_I_Bit:OR:xlli_CPSR_F_Bit)
    mrs     r2, cpsr
    and     r0, r2, r1   ; This is the return with the current int flags
    orr     r2, r2, r1
    msr     cpsr_c, r2 ; Only interested in control fields

    IF Interworking :LOR: Thumbing
     bx  lr
    ELSE
     mov  pc, lr          ; return
    ENDIF

;;
;; end of pmDisableInts()
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;;
;; void  pmRestoreInts (UINT32)
;;
;;  Set the I+F bits in the CPSR to the values received in R0.
;;  - Protects against changing any other bits the CPSR.
;;  - If the value returned by pmDisableInts() is used as the parameter, 
;;    this function restores the interrupt enable/disable state to
;;    that which existed at the time pmDisableInts() was invoked.
;;
    LEAF_ENTRY pmRestoreInts

    mov     r1, #(xlli_CPSR_I_Bit:OR:xlli_CPSR_F_Bit)
    and     r0, r0, r1 ; Isolate the I+F bits
    mrs     r2, cpsr   ; Get existing settings
    bic     r2, r2, r1 ; Clear out the flag locations
    orr     r2, r2, r0 ; Set the restored flags in place
    msr     cpsr_c, r2 ; Only interested in control fields

    IF Interworking :LOR: Thumbing
     bx  lr
    ELSE
     mov  pc, lr          ; return
    ENDIF

;;
;; end of pmDisableInts()
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;
; XSC1GetCPSR - Returns the Current Program Status Register
;
;       Uses r0 returns CPSR

    LEAF_ENTRY XSC1GetCPSR

    mrs     r0, CPSR

    IF Interworking :LOR: Thumbing
     bx  lr
    ELSE
     mov  pc, lr          ; return
    ENDIF

;; End of XSC1GetCPSR()
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    END