ad_s_machine.map.summary

来自「用ＶＨＤＬ实现Ａ／Ｄ转换的状态机的控制」· SUMMARY 代码 · 共 11 行

Analysis & Synthesis Status : Successful - Sat Oct 28 12:16:42 2006
Quartus II Version : 6.0 Build 202 06/20/2006 SP 1 SJ Full Version
Revision Name : ad_s_machine
Top-level Entity Name : ad_s_machine
Family : Cyclone
Total logic elements : 14
Total pins : 28
Total virtual pins : 0
Total memory bits : 0
Total PLLs : 0