mc14495.vhd

CPLDFPGA嵌入式应用开发技术白金手册

-- 七段锁存译码驱动器，不带小数点，如需显示小数点，则输出结果或”10000000“
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity mc14495 is
port(datain:in std_logic_vector(7 downto 0);
	dataout :out std_logic_vector(7 downto 0));
end mc14495;
architecture behav of mc14495 is
begin
process
begin
case datain is
when "00000000"=>dataout<="00111111";--"0"
when "00000001"=>dataout<="00000110";--"1"
when "00000010"=>dataout<="01011011";--"2"
when "00000011"=>dataout<="01001111";--"3"
when "00000100"=>dataout<="01100110";--"4"
when "00000101"=>dataout<="01101101";--"5"
when "00000110"=>dataout<="01111101";--"6"
when "00000111"=>dataout<="00000111";--"7"
when "00001000"=>dataout<="01111111";--"8"
when "00001001"=>dataout<="01101111";--"9"
when "00001010"=>dataout<="01110111";--"A"
when "00001011"=>dataout<="01111100";--"B"
when "00001100"=>dataout<="00111001";--"C"
when "00001101"=>dataout<="10011110";--"D"
when "00001110"=>dataout<="01111001";--"E"
when "00001111"=>dataout<="01110001";--"F"
when "01110011"=>dataout<="01110011";--"P"
when "00111110"=>dataout<="00111110";--"U"
when "00110001"=>dataout<="00110001";--"1-"
when "01101110"=>dataout<="01101110";--"Y"
when "01110110"=>dataout<="01110110";--"H"
when "00111000"=>dataout<="00111000";--"L"
when others=>dataout<="00000000";    --"灭"
end case;
end process;
end behav;