prosses.s

前段时间做的一个东西,用的24位高精度AD转换芯片CS5532和12DA转换器max531的AVR驱动.芯片用的是ATMEGA8515,开发环境ICCAVR.CS5532的内部寄存器太多,设置有些复杂

	.module prosses.c
	.area text(rom, con, rel)
	.dbfile C:\icc\project\cs5532\prosses.c
	.dbfunc s prosses _prosses fI
;      prosses_i -> R20
	.even
_prosses::
	rcall push_gset1
	.dbline -1
	.dbline 5
; unsigned int prodata[10];
; unsigned int all[5];
; extern unsigned char data[3];  //receive cs5522's number;
;  void prosses(void)
;        {
	.dbline 7
; 	     unsigned char prosses_i;
; 		 prosses_i=10;
	ldi R20,10
	rjmp L3
L2:
	.dbline 9
	.dbline 10
	ldi R16,128
	ldi R17,0
	rcall _ADC
	.dbline 11
	rcall _ReceiveData
	.dbline 12
	lds R2,_data+1
	clr R3
	lds R4,_data+2
	clr R5
	mov R5,R4
	clr R4
	add R4,R2
	adc R5,R3
	ldi R24,<_prodata
	ldi R25,>_prodata
	mov R30,R20
	clr R31
	sbiw R30,1
	lsl R30
	rol R31
	add R30,R24
	adc R31,R25
	std z+0,R4
	std z+1,R5
	.dbline 13
	dec R20
	.dbline 14
L3:
	.dbline 8
; 		 while(prosses_i)
	tst R20
	brne L2
	.dbline 15
; 		 {  
; 	        ADC(0x80);		 
; 		   ReceiveData();//接收数据 		 	 
; 	  	   prodata[prosses_i-1]=data[2]*256+data[1];	
; 		   prosses_i--;	   
; 		  } 
; 		 prosses_i=5;
	ldi R20,5
	rjmp L8
L7:
	.dbline 17
	.dbline 17
	mov R2,R20
	clr R3
	lsl R2
	rol R3
	ldi R24,<_prodata
	ldi R25,>_prodata
	mov R30,R2
	mov R31,R3
	sbiw R30,2
	lsl R30
	rol R31
	add R30,R24
	adc R31,R25
	ldd R4,z+0
	ldd R5,z+1
	mov R30,R2
	mov R31,R3
	sbiw R30,1
	lsl R30
	rol R31
	add R30,R24
	adc R31,R25
	ldd R2,z+0
	ldd R3,z+1
	add R2,R4
	adc R3,R5
	ldi R24,<_all
	ldi R25,>_all
	mov R30,R20
	clr R31
	sbiw R30,1
	lsl R30
	rol R31
	add R30,R24
	adc R31,R25
	std z+0,R2
	std z+1,R3
	.dbline 18
	dec R20
	.dbline 20
L8:
	.dbline 16
; 		 while(prosses_i)
	tst R20
	brne L7
	.dbline 21
; 		     { all[prosses_i-1]=(prodata[prosses_i*2-1]+prodata[prosses_i*2-2]);
; 			   prosses_i--;
; 				 
; 			}
; 		prosses_i=5;
	ldi R20,5
	rjmp L11
L10:
	.dbline 23
	.dbline 24
	ldi R24,<_all
	ldi R25,>_all
	mov R30,R20
	clr R31
	sbiw R30,1
	lsl R30
	rol R31
	add R30,R24
	adc R31,R25
	mov R2,R30
	mov R3,R31
	ldd R4,z+0
	ldd R5,z+1
	lsr R5
	ror R4
	std z+0,R4
	std z+1,R5
	.dbline 25
	dec R20
	.dbline 26
L11:
	.dbline 22
; 		while(prosses_i)
	tst R20
	brne L10
	.dbline 28
; 		     {
; 			   all[prosses_i-1]=all[prosses_i-1]/2;
; 			   prosses_i--;
; 			 }	 
; 		 //--------------------------
; 	   all[1]=all[1]+all[0];
	lds R3,_all+1
	lds R2,_all
	lds R5,_all+2+1
	lds R4,_all+2
	add R4,R2
	adc R5,R3
	sts _all+2+1,R5
	sts _all+2,R4
	.dbline 29
; 	   all[1]=all[1]/2;
	mov R2,R4
	mov R3,R5
	lsr R3
	ror R2
	sts _all+2+1,R3
	sts _all+2,R2
	.dbline 30
; 	   all[3]=all[2]+all[3];
	lds R3,_all+6+1
	lds R2,_all+6
	lds R5,_all+4+1
	lds R4,_all+4
	add R4,R2
	adc R5,R3
	sts _all+6+1,R5
	sts _all+6,R4
	.dbline 31
; 	   all[3]=all[3]/2;
	mov R2,R4
	mov R3,R5
	lsr R3
	ror R2
	sts _all+6+1,R3
	sts _all+6,R2
	.dbline 32
; 	   all[1]=all[1]+all[3];
	lds R5,_all+2+1
	lds R4,_all+2
	add R4,R2
	adc R5,R3
	sts _all+2+1,R5
	sts _all+2,R4
	.dbline 33
; 	   all[1]=all[1]/2;
	mov R2,R4
	mov R3,R5
	lsr R3
	ror R2
	sts _all+2+1,R3
	sts _all+2,R2
	.dbline 34
; 	   all[4]=all[4]+all[1];
	lds R5,_all+8+1
	lds R4,_all+8
	add R4,R2
	adc R5,R3
	sts _all+8+1,R5
	sts _all+8,R4
	.dbline 35
; 	   all[4]=all[4]/2;
	mov R2,R4
	mov R3,R5
	lsr R3
	ror R2
	sts _all+8+1,R3
	sts _all+8,R2
	rjmp L33
L32:
	.dbline 37
	.dbline 38
	lds R25,_all+8+1
	lds R24,_all+8
	subi R24,0
	sbci R25,1
	sts _all+8+1,R25
	sts _all+8,R24
	.dbline 39
	lds R24,_data+2
	subi R24,255	; addi 1
	sts _data+2,R24
	.dbline 41
L33:
	.dbline 36
; 	   while(all[4]>=256)
	lds R25,_all+8+1
	lds R24,_all+8
	cpi R24,0
	ldi R30,1
	cpc R25,R30
	brsh L32
	.dbline 42
; 	        {
; 			  all[4]=all[4]-256;
; 			  data[2]++;
; 			
; 			}
; 	   data[1]=all[4];
	mov R2,R24
	mov R3,R25
	sts _data+1,R2
	.dbline -2
	.dbline 45
; 	   
; 	   
; 	   }
L1:
	rcall pop_gset1
	.dbline 0 ; func end
	ret
	.dbsym r prosses_i 20 c
	.area bss(ram, con, rel)
	.dbfile C:\icc\project\cs5532\prosses.c
_all::
	.blkb 10
	.dbsym s all _all A[10:5]i
_prodata::
	.blkb 20
	.dbsym s prodata _prodata A[20:10]i