bitstd.map.eqn

《CPLD_FPGA设计及应用》课件与实例

--inst is inst
--operation mode is normal

inst_lut_out = din;
inst = DFFEA(inst_lut_out, clk, , , , , );


--inst1 is inst1
--operation mode is normal

inst1 = inst $ din;


--din is din
--operation mode is input

din = INPUT();


--clk is clk
--operation mode is input

clk = INPUT();


--out is out
--operation mode is output

out = OUTPUT(inst1);