iirno.fit.eqn

《CPLD_FPGA设计及应用》课件与实例

--A1L651 is addyn1a~15 at LCCOMB_X11_Y19_N26
A1L651 = counterbt[0] & regyn1a[5] & ( !counterbt[2] ) # !counterbt[0] & regyn1a[5] & ( !counterbt[1] # counterbt[2] );


--A1L551 is addyn1a~14 at LCCOMB_X10_Y19_N0
A1L551 = counterbt[0] & regyn1a[4] & ( !counterbt[2] ) # !counterbt[0] & regyn1a[4] & ( !counterbt[1] # counterbt[2] );


--A1L451 is addyn1a~13 at LCCOMB_X9_Y19_N12
A1L451 = counterbt[0] & regyn1a[3] & ( !counterbt[2] ) # !counterbt[0] & regyn1a[3] & ( !counterbt[1] # counterbt[2] );


--A1L351 is addyn1a~12 at LCCOMB_X10_Y20_N24
A1L351 = counterbt[1] & regyn1a[2] & ( !counterbt[0] $ !counterbt[2] ) # !counterbt[1] & regyn1a[2] & ( !counterbt[0] # !counterbt[2] );


--A1L251 is addyn1a~11 at LCCOMB_X10_Y20_N30
A1L251 = counterbt[0] & ( !counterbt[2] & regyn1a[1] ) # !counterbt[0] & ( regyn1a[1] & (!counterbt[1] # counterbt[2]) );


--A1L151 is addyn1a~10 at LCCOMB_X10_Y20_N28
A1L151 = regyn1a[0] & ( !counterbt[2] & (!counterbt[1] # counterbt[0]) # counterbt[2] & !counterbt[0] );


--A1L353 is counterbt~259 at LCCOMB_X9_Y23_N2
A1L353 = C1_safe_q[1] & C1_safe_q[0] # !C1_safe_q[1] & C1_safe_q[0] # C1_safe_q[1] & !C1_safe_q[0] & ( !C1_safe_q[3] # C1_safe_q[2] ) # !C1_safe_q[1] & !C1_safe_q[0];


--A1L816 is resulta[17]~1281 at LCCOMB_X10_Y21_N26
A1L816 = LCELL(A1L176 & ( !A1L133 # !clr & A1L816 ) # !A1L176 & ( A1L133 & !clr & A1L816 ));


--A1L616 is resulta[16]~1282 at LCCOMB_X11_Y21_N12
A1L616 = LCELL(A1L966 & ( !A1L133 # !clr & A1L616 ) # !A1L966 & ( A1L133 & !clr & A1L616 ));


--A1L416 is resulta[15]~1283 at LCCOMB_X11_Y21_N0
A1L416 = LCELL(A1L766 & ( !A1L133 # A1L416 & !clr ) # !A1L766 & ( A1L416 & A1L133 & !clr ));


--A1L216 is resulta[14]~1284 at LCCOMB_X11_Y21_N20
A1L216 = LCELL(A1L566 & ( !A1L133 # A1L216 & !clr ) # !A1L566 & ( A1L216 & !clr & A1L133 ));


--A1L016 is resulta[13]~1285 at LCCOMB_X10_Y21_N22
A1L016 = LCELL(A1L366 & ( !A1L133 # !clr & A1L016 ) # !A1L366 & ( A1L133 & !clr & A1L016 ));


--A1L806 is resulta[12]~1286 at LCCOMB_X10_Y21_N28
A1L806 = LCELL(A1L166 & ( !A1L133 # A1L806 & !clr ) # !A1L166 & ( A1L806 & A1L133 & !clr ));


--A1L606 is resulta[11]~1287 at LCCOMB_X9_Y21_N0
A1L606 = LCELL(A1L956 & ( !A1L133 # A1L606 & !clr ) # !A1L956 & ( A1L606 & !clr & A1L133 ));


--A1L406 is resulta[10]~1288 at LCCOMB_X9_Y21_N20
A1L406 = LCELL(A1L756 & ( !A1L133 # A1L406 & !clr ) # !A1L756 & ( A1L133 & A1L406 & !clr ));


--A1L206 is resulta[9]~1289 at LCCOMB_X9_Y21_N4
A1L206 = LCELL(A1L556 & ( !A1L133 # A1L206 & !clr ) # !A1L556 & ( A1L206 & !clr & A1L133 ));


--A1L006 is resulta[8]~1290 at LCCOMB_X9_Y22_N12
A1L006 = LCELL(A1L356 & ( !A1L133 # !clr & A1L006 ) # !A1L356 & ( !clr & A1L006 & A1L133 ));


--A1L895 is resulta[7]~1291 at LCCOMB_X10_Y22_N0
A1L895 = LCELL(A1L156 & ( !A1L133 # !clr & A1L895 ) # !A1L156 & ( A1L133 & !clr & A1L895 ));


--A1L695 is resulta[6]~1292 at LCCOMB_X10_Y22_N12
A1L695 = LCELL(A1L946 & ( !A1L133 # !clr & A1L695 ) # !A1L946 & ( A1L133 & !clr & A1L695 ));


--A1L495 is resulta[5]~1293 at LCCOMB_X9_Y22_N24
A1L495 = LCELL(A1L746 & ( !A1L133 # !clr & A1L495 ) # !A1L746 & ( !clr & A1L495 & A1L133 ));


--A1L295 is resulta[4]~1294 at LCCOMB_X10_Y22_N8
A1L295 = LCELL(A1L546 & ( !A1L133 # !clr & A1L295 ) # !A1L546 & ( A1L133 & !clr & A1L295 ));


--A1L095 is resulta[3]~1295 at LCCOMB_X9_Y22_N22
A1L095 = LCELL(A1L133 & A1L346 & ( !clr & A1L095 ) # !A1L133 & A1L346 # A1L133 & !A1L346 & ( !clr & A1L095 ));


--A1L885 is resulta[2]~1296 at LCCOMB_X10_Y22_N6
A1L885 = LCELL(A1L146 & ( !A1L133 # A1L885 & !clr ) # !A1L146 & ( A1L885 & !clr & A1L133 ));


--A1L685 is resulta[1]~1297 at LCCOMB_X9_Y22_N18
A1L685 = LCELL(A1L133 & A1L936 & ( !clr & A1L685 ) # !A1L133 & A1L936 # A1L133 & !A1L936 & ( !clr & A1L685 ));


--A1L376 is suma[17]~1134 at LCCOMB_X9_Y21_N10
A1L376 = LCELL(A1L922 & ( A1L376 & A1L744 # A1L133 ) # !A1L922 & ( A1L376 & A1L744 & !A1L133 ));


--A1L176 is suma[16]~1135 at LCCOMB_X10_Y21_N24
A1L176 = LCELL(A1L522 & ( A1L176 & A1L744 # A1L133 ) # !A1L522 & ( !A1L133 & A1L176 & A1L744 ));


--A1L966 is suma[15]~1136 at LCCOMB_X11_Y21_N14
A1L966 = LCELL(A1L122 & ( A1L966 & A1L744 # A1L133 ) # !A1L122 & ( !A1L133 & A1L966 & A1L744 ));


--A1L766 is suma[14]~1137 at LCCOMB_X11_Y21_N30
A1L766 = LCELL(A1L712 & ( A1L766 & A1L744 # A1L133 ) # !A1L712 & ( A1L766 & A1L744 & !A1L133 ));


--A1L566 is suma[13]~1138 at LCCOMB_X11_Y21_N26
A1L566 = LCELL(A1L312 & ( A1L566 & A1L744 # A1L133 ) # !A1L312 & ( A1L566 & A1L744 & !A1L133 ));


--A1L366 is suma[12]~1139 at LCCOMB_X10_Y21_N20
A1L366 = LCELL(A1L902 & ( A1L366 & A1L744 # A1L133 ) # !A1L902 & ( A1L366 & !A1L133 & A1L744 ));


--A1L166 is suma[11]~1140 at LCCOMB_X10_Y21_N30
A1L166 = LCELL(A1L502 & ( A1L166 & A1L744 # A1L133 ) # !A1L502 & ( !A1L133 & A1L166 & A1L744 ));


--A1L956 is suma[10]~1141 at LCCOMB_X9_Y21_N26
A1L956 = LCELL(A1L102 & ( A1L956 & A1L744 # A1L133 ) # !A1L102 & ( A1L956 & !A1L133 & A1L744 ));


--A1L756 is suma[9]~1142 at LCCOMB_X9_Y21_N14
A1L756 = LCELL(A1L791 & A1L133 # A1L791 & !A1L133 & ( A1L756 & A1L744 ) # !A1L791 & !A1L133 & ( A1L756 & A1L744 ));


--A1L556 is suma[8]~1143 at LCCOMB_X9_Y21_N30
A1L556 = LCELL(A1L391 & A1L133 # A1L391 & !A1L133 & ( A1L744 & A1L556 ) # !A1L391 & !A1L133 & ( A1L744 & A1L556 ));


--A1L356 is suma[7]~1144 at LCCOMB_X9_Y22_N10
A1L356 = LCELL(A1L981 & ( A1L356 & A1L744 # A1L133 ) # !A1L981 & ( A1L356 & A1L744 & !A1L133 ));


--A1L156 is suma[6]~1145 at LCCOMB_X10_Y22_N2
A1L156 = LCELL(A1L581 & ( A1L156 & A1L744 # A1L133 ) # !A1L581 & ( A1L156 & !A1L133 & A1L744 ));


--A1L946 is suma[5]~1146 at LCCOMB_X10_Y22_N14
A1L946 = LCELL(A1L181 & ( A1L946 & A1L744 # A1L133 ) # !A1L181 & ( !A1L133 & A1L946 & A1L744 ));


--A1L746 is suma[4]~1147 at LCCOMB_X9_Y22_N30
A1L746 = LCELL(A1L771 & ( A1L744 & A1L746 # A1L133 ) # !A1L771 & ( !A1L133 & A1L744 & A1L746 ));


--A1L546 is suma[3]~1148 at LCCOMB_X10_Y22_N10
A1L546 = LCELL(A1L371 & ( A1L546 & A1L744 # A1L133 ) # !A1L371 & ( A1L546 & !A1L133 & A1L744 ));


--A1L346 is suma[2]~1149 at LCCOMB_X9_Y22_N0
A1L346 = LCELL(A1L961 & ( A1L346 & A1L744 # A1L133 ) # !A1L961 & ( A1L346 & !A1L133 & A1L744 ));


--A1L146 is suma[1]~1150 at LCCOMB_X10_Y22_N4
A1L146 = LCELL(A1L561 & ( A1L146 & A1L744 # A1L133 ) # !A1L561 & ( A1L146 & !A1L133 & A1L744 ));


--A1L936 is suma[0]~1151 at LCCOMB_X9_Y22_N4
A1L936 = LCELL(A1L744 & A1L133 & ( A1L161 ) # !A1L744 & A1L133 & ( A1L161 ) # A1L744 & !A1L133 & ( A1L936 ));


--A1L914 is datayntempa[9]~620 at LCCOMB_X9_Y22_N28
A1L914 = LCELL(A1L883 & ( !A1L744 # A1L914 ) # !A1L883 & ( A1L744 & A1L914 ));


--A1L714 is datayntempa[8]~621 at LCCOMB_X11_Y22_N10
A1L714 = LCELL(A1L744 & A1L714 # !A1L744 & A1L714 & ( A1L683 ) # !A1L744 & !A1L714 & ( A1L683 ));


--A1L514 is datayntempa[7]~622 at LCCOMB_X11_Y21_N10
A1L514 = LCELL(A1L514 & ( A1L744 # A1L483 ) # !A1L514 & ( A1L483 & !A1L744 ));


--A1L314 is datayntempa[6]~623 at LCCOMB_X11_Y21_N2
A1L314 = LCELL(!A1L744 & A1L283 # A1L744 & A1L314);


--A1L114 is datayntempa[5]~624 at LCCOMB_X11_Y21_N22
A1L114 = LCELL(!A1L744 & A1L083 # A1L744 & A1L114);


--A1L904 is datayntempa[4]~625 at LCCOMB_X11_Y21_N6
A1L904 = LCELL(A1L904 & ( A1L744 # A1L873 ) # !A1L904 & ( A1L873 & !A1L744 ));


--A1L704 is datayntempa[3]~626 at LCCOMB_X9_Y21_N18
A1L704 = LCELL(A1L744 & ( A1L704 ) # !A1L744 & ( A1L673 ));


--A1L504 is datayntempa[2]~627 at LCCOMB_X9_Y21_N2
A1L504 = LCELL(A1L744 & ( A1L504 ) # !A1L744 & ( A1L473 ));


--A1L304 is datayntempa[1]~628 at LCCOMB_X9_Y21_N22
A1L304 = LCELL(A1L273 & ( !A1L744 # A1L304 ) # !A1L273 & ( A1L304 & A1L744 ));


--A1L104 is datayntempa[0]~629 at LCCOMB_X9_Y21_N6
A1L104 = LCELL(A1L073 & ( !A1L744 # A1L104 ) # !A1L073 & ( A1L104 & A1L744 ));


--A1L883 is datayna[9]~681 at LCCOMB_X9_Y21_N8
A1L883 = LCELL(A1L376 & ( !clr & (A1L883 # clkreg) ) # !A1L376 & ( !clr & !clkreg & A1L883 ));


--A1L683 is datayna[8]~682 at LCCOMB_X11_Y21_N16
A1L683 = LCELL(A1L176 & !clr & ( A1L683 # clkreg ) # !A1L176 & !clr & ( !clkreg & A1L683 ));


--A1L483 is datayna[7]~683 at LCCOMB_X11_Y21_N8
A1L483 = LCELL(A1L966 & ( !clr & (clkreg # A1L483) ) # !A1L966 & ( A1L483 & !clr & !clkreg ));


--A1L283 is datayna[6]~684 at LCCOMB_X11_Y21_N28
A1L283 = LCELL(A1L766 & ( !clr & (clkreg # A1L283) ) # !A1L766 & ( A1L283 & !clkreg & !clr ));


--A1L083 is datayna[5]~685 at LCCOMB_X11_Y21_N24
A1L083 = LCELL(!clr & (!clkreg & A1L083 # clkreg & A1L566));


--A1L873 is datayna[4]~686 at LCCOMB_X11_Y21_N4
A1L873 = LCELL(A1L366 & ( !clr & (clkreg # A1L873) ) # !A1L366 & ( A1L873 & !clkreg & !clr ));


--A1L673 is datayna[3]~687 at LCCOMB_X9_Y21_N16
A1L673 = LCELL(A1L166 & ( !clr & (clkreg # A1L673) ) # !A1L166 & ( A1L673 & !clkreg & !clr ));


--A1L473 is datayna[2]~688 at LCCOMB_X9_Y21_N24
A1L473 = LCELL(!clr & (!clkreg & A1L473 # clkreg & A1L956));


--A1L273 is datayna[1]~689 at LCCOMB_X7_Y21_N26
A1L273 = LCELL(A1L756 & clkreg & ( !clr ) # A1L756 & !clkreg & ( A1L273 & !clr ) # !A1L756 & !clkreg & ( A1L273 & !clr ));


--A1L073 is datayna[0]~690 at LCCOMB_X7_Y21_N18
A1L073 = LCELL(A1L556 & ( !clr & (A1L073 # clkreg) ) # !A1L556 & ( !clkreg & A1L073 & !clr ));


--A1L911 is addyn0a~100 at LCCOMB_X11_Y20_N16
A1L911 = regyn0a[0] & counterbt[3] & ( !counterbt[2] & !counterbt[1] & !counterbt[0] ) # regyn0a[0] & !counterbt[3] & ( !counterbt[2] & counterbt[1] & !counterbt[0] # counterbt[2] & (!counterbt[1] $ counterbt[0]) );


--A1L021 is addyn0a~101 at LCCOMB_X11_Y20_N0
A1L021 = regyn0a[1] & counterbt[3] & ( !counterbt[2] & !counterbt[1] & !counterbt[0] ) # regyn0a[1] & !counterbt[3] & ( !counterbt[2] & counterbt[1] & !counterbt[0] # counterbt[2] & (!counterbt[1] $ counterbt[0]) );


--A1L121 is addyn0a~102 at LCCOMB_X11_Y20_N24
A1L121 = counterbt[3] & ( !counterbt[2] & !counterbt[1] & regyn0a[2] & !counterbt[0] ) # !counterbt[3] & ( regyn0a[2] & (!counterbt[2] & counterbt[1] & !counterbt[0] # counterbt[2] & (!counterbt[1] $ counterbt[0])) );


--A1L221 is addyn0a~103 at LCCOMB_X11_Y20_N26
A1L221 = counterbt[3] & ( !counterbt[2] & !counterbt[1] & regyn0a[3] & !counterbt[0] ) # !counterbt[3] & ( regyn0a[3] & (!counterbt[2] & counterbt[1] & !counterbt[0] # counterbt[2] & (!counterbt[1] $ counterbt[0])) );


--A1L321 is addyn0a~104 at LCCOMB_X11_Y20_N4
A1L321 = regyn0a[4] & ( !counterbt[2] & !counterbt[0] & (!counterbt[1] $ !counterbt[3]) # counterbt[2] & !counterbt[3] & (!counterbt[1] $ counterbt[0]) );


--A1L421 is addyn0a~105 at LCCOMB_X11_Y20_N6
A1L421 = counterbt[3] & ( !counterbt[2] & !counterbt[1] & regyn0a[5] & !counterbt[0] ) # !counterbt[3] & ( regyn0a[5] & (!counterbt[2] & counterbt[1] & !counterbt[0] # counterbt[2] & (!counterbt[1] $ counterbt[0])) );


--A1L521 is addyn0a~106 at LCCOMB_X11_Y20_N8
A1L521 = counterbt[0] & ( !counterbt[3] & counterbt[1] & counterbt[2] & regyn0a[6] ) # !counterbt[0] & ( regyn0a[6] & (!counterbt[3] & (!counterbt[1] $ !counterbt[2]) # counterbt[3] & !counterbt[1] & !counterbt[2]) );


--A1L621 is addyn0a~107 at LCCOMB_X11_Y20_N12
A1L621 = counterbt[0] & regyn0a[7] & ( !counterbt[3] & counterbt[1] & counterbt[2] ) # !counterbt[0] & regyn0a[7] & ( !counterbt[3] & (!counterbt[1] $ !counterbt[2]) # counterbt[3] & !counterbt[1] & !counterbt[2] );


--A1L721 is addyn0a~108 at LCCOMB_X11_Y20_N20
A1L721 = counterbt[3] & ( !counterbt[2] & !counterbt[1] & !counterbt[0] & regyn0a[8] ) # !counterbt[3] & ( regyn0a[8] & (!counterbt[2] & counterbt[1] & !counterbt[0] # counterbt[2] & (!counterbt[1] $ counterbt[0])) );


--A1L821 is addyn0a~109 at LCCOMB_X11_Y20_N22
A1L821 = counterbt[3] & ( !counterbt[2] & !counterbt[1] & regyn0a[9] & !counterbt[0] ) # !counterbt[3] & ( regyn0a[9] & (!counterbt[2] & counterbt[1] & !counterbt[0] # counterbt[2] & (!counterbt[1] $ counterbt[0])) );


--clk is clk at PIN_N20
--operation mode is input

clk = INPUT();


--dinxn[9] is dinxn[9] at PIN_B13
--operation mode is input

dinxn[9] = INPUT();


--clr is clr at PIN_M21
--operation mode is input

clr = INPUT();


--dinxn[8] is dinxn[8] at PIN_B11
--operation mode is input

dinxn[8] = INPUT();


--dinxn[7] is dinxn[7] at PIN_D8
--operation mode is input

dinxn[7] = INPUT();


--dinxn[6] is dinxn[6] at PIN_B10
--operation mode is input

dinxn[6] = INPUT();


--dinxn[5] is dinxn[5] at PIN_V13
--operation mode is input

dinxn[5] = INPUT();


--dinxn[4] is dinxn[4] at PIN_F1
--operation mode is input

dinxn[4] = INPUT();


--dinxn[3] is dinxn[3] at PIN_D20
--operation mode is input

dinxn[3] = INPUT();


--dinxn[2] is dinxn[2] at PIN_N19
--operation mode is input

dinxn[2] = INPUT();


--dinxn[1] is dinxn[1] at PIN_M20
--operation mode is input

dinxn[1] = INPUT();


--dinxn[0] is dinxn[0] at PIN_P19
--operation mode is input

dinxn[0] = INPUT();


--regxn0acs[9] is regxn0acs[9] at PIN_G12
--operation mode is output

regxn0acs[9] = OUTPUT(regxn0a[9]);


--regxn0acs[8] is regxn0acs[8] at PIN_A13
--operation mode is output

regxn0acs[8] = OUTPUT(regxn0a[8]);


--regxn0acs[7] is regxn0acs[7] at PIN_F9
--operation mode is output

regxn0acs[7] = OUTPUT(regxn0a[7]);


--regxn0acs[6] is regxn0acs[6] at PIN_D13
--operation mode is output

regxn0acs[6] = OUTPUT(regxn0a[6]);


--regxn0acs[5] is regxn0acs[5] at PIN_G18
--operation mode is output

regxn0acs[5] = OUTPUT(regxn0a[5]);


--regxn0acs[4] is regxn0acs[4] at PIN_E9
--operation mode is output

regxn0acs[4] = OUTPUT(regxn0a[4]);


--regxn0acs[3] is regxn0acs[3] at PIN_C19
--operation mode is output

regxn0acs[3] = OUTPUT(regxn0a[3]);


--regxn0acs[2] is regxn0acs[2] at PIN_N22
--operation mode is output

regxn0acs[2] = OUTPUT(regxn0a[2]);


--regxn0acs[1] is regxn0acs[1] at PIN_D21
--operation mode is output