top.xst

来自「TMS3205402Verilog HDL源码」· XST 代码 · 共 31 行

set -tmpdir __projnav
run
-ifn top.prj
-ifmt VERILOG
-ofn top
-ofmt NGC
-p xc9500xl
-top top
-opt_mode Speed
-opt_level 1
-iuc NO
-keep_hierarchy YES
-rtlview Yes
-cross_clock_analysis NO
-hierarchy_separator _
-bus_delimiter <>
-case maintain
-verilog2001 YES
-vlgpath 
-vlgincdir 
-fsm_extract YES -fsm_encoding Auto
-mux_extract YES
-resource_sharing YES
-complex_clken YES
-iobuf YES
-equivalent_register_removal YES
-pld_mp YES
-pld_xp YES
-pld_ce YES
-wysiwyg NO