nand_drv.c

Nand Flash low driver。

	//EnableNAND();
	ErrorCode = NandWriteNoEcc(udAddress,udLenght,Buffer);
	//DisableNAND();

	return ErrorCode ;
}
#endif

#if 0
NAND_Ret NAND_SpareRead(UINT32 udAddress, dataWidth *pOobBuf, UINT32 udLenght)
{
	UINT8 ErrorCode ;

	//EnableNAND();
	ErrorCode = NandReadOOB(udAddress,udLenght,pOobBuf);
	//DisableNAND();
	return ErrorCode ;
}
#endif

#if 0
NAND_Ret NAND_SpareProgram(UINT32 udAddress, dataWidth *pOobBuf, UINT32 udLenght)
{
	UINT8 ErrorCode ;
	
	//EnableNAND();
	ErrorCode = NandWriteOOB(udAddress,udLenght,pOobBuf);
	//DisableNAND();
	return ErrorCode ;
}
#endif

#if (NFLASH_TYPE == TYPE_IS_K9F1208X0B) 

static NAND_Ret ChipFastErase(void)
{
	UINT32 erase_address0  ;
	UINT32 erase_address1;
	UINT32 erase_address2 ;
	UINT32 erase_address3 ;
	UINT8 tmp, device_status ;
	UINT32 i ;
	
	HD_NFlashInit() ;

	/*if Write protection is valid*/
	if (!IsWriteProtect())
	{
		DEBUG_OUT("Erase NAND_WRPRT_ERR\n\r") ;
		return NAND_WRPRT_ERR;
	}

	for (i = 0 ; i < FLASH_SIZE_64MB; i += 0x10000)
	{
		erase_address0 = i | 0x80000000 ;
		erase_address1 = erase_address0 + 0x4000 ;
		erase_address2 = erase_address1 + 0x4000 ;
		erase_address3 = erase_address2 + 0x4000 ;

		WRITE_REG32(NFLASH_NFINTP_ADDR,1) ;
		mNandWrite_SET_CLE(BLOCK_ERASE_CMD1);
		mNandWrite_SET_ALE(erase_address0) ; /*Plane 0*/
		mNandWrite_SET_CLE(BLOCK_ERASE_CMD1);
		mNandWrite_SET_ALE(erase_address1) ; /*Plane 1*/
		mNandWrite_SET_CLE(BLOCK_ERASE_CMD1);
		mNandWrite_SET_ALE(erase_address2) ; /*Plane 2*/
		mNandWrite_SET_CLE(BLOCK_ERASE_CMD1);
		mNandWrite_SET_ALE(erase_address3) ; /*Plane 3*/
		mNandWrite_SET_CLE(BLOCK_ERASE_CMD2);

		if (!IsReadyToRW())
		{
			DEBUG_OUT("Erase NAND_HW_ERR\n\r") ;
			return NAND_HW_ERR ;
		}

		mNandWrite_SET_CLE(READ_MULTI_PLANE_STATUS_CMD);
		tmp = (UINT8) mNand_Read_Data();
		device_status = (UINT8) (tmp & 0x1f) ;

		if ((device_status & MULTI_PASS_BIT) != 0)
		{	
			return NAND_PRG_FAIL ;
		} /* 1 is sucess*/
	}
	return NAND_PASS ;
}

NAND_Ret NandChipFastErase(void)
{
	UINT8 ErrorCode ;
	EnableNAND();
	ErrorCode = ChipFastErase();
	DisableNAND();

	return ErrorCode ;
}
#endif/*(NFLASH_TYPE == TYPE_IS_K9F1208X0B) */

//static NAND_Ret NandReadOOBNoDMA(UINT32 udAddress, UINT32 len, UINT8 *pOobBuf)
 NAND_Ret NAND_SpareReadRandom(UINT32 udAddress,  UINT8 *pOobBuf,UINT32 len)
{
#ifdef _NAND_DEBUG_
	DEBUG_OUT("NandReadOOB\n\r") ;
	if ((pOobBuf == NULL) || (len > 16))
	{
		DEBUG_OUT("Roob NAND_SW_ERR\n\r") ;
		return NAND_SW_ERR ;
	}
	if (udAddress >= FLASH_SIZE_64MB)
	{
		DEBUG_OUT("Roob NAND_ADDR_OVERFLOW\n\r") ;
		return NAND_ADDR_OVERFLOW;
	}
	/* Control if the address is the buffer size is within the page*/   
	if (((udAddress % PAGE_SPARE_SIZE) + len) > PAGE_SPARE_SIZE)
	{
		DEBUG_OUT("Woob NAND_PAGE_OVERFLOW\n\r") ;
		return NAND_PAGE_OVERFLOW;
	}
#endif /*_NAND_DEBUG_*/

	//udAddress &= 0x03ffff0f ; /*a0-a3:valid address ,a4-a7:dont care*/
	WRITE_REG32(NFLASH_NFINTP_ADDR,1) ;
	mNandWrite_SET_CLE(READ2_CMD); 
	mNandWrite_SET_ALE((udAddress &0x03ffff0f)) ;

	if (!IsReadyToRW())
	{
		DEBUG_OUT("Roob NAND_HW_ERR\n\r") ;
		return NAND_FAIL ;
	}


	{
		UINT8 *pd = pOobBuf ;

		 	 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 			
                      *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ;
 			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ;
 			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ;
 			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ;
 			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
	}


	return NAND_PASS;
}
#if 0
NAND_Ret NAND_SpareReadRandom(UINT32 udAddress, dataWidth *pOobBuf, UINT32 udLenght)
{
	UINT8 ErrorCode ;
	//EnableNAND();
	ErrorCode = NandReadOOBNoDMA(udAddress,udLenght,pOobBuf);
	//DisableNAND();
	return ErrorCode ;
}
#endif


NAND_Ret NAND_ChipErase(void)
{
	UINT8 ErrorCode ;
	UINT32 i ;

	NAND_Init();

	EnableNAND();
	for (i=0;i<FLASH_SIZE_64MB;i+=0x4000)
	{
	   ErrorCode = NAND_BlockErase(i);
	   if( ErrorCode != NAND_PASS)
	   	return ErrorCode ;
	}
	DisableNAND();
	return ErrorCode ;
}


  NAND_Ret NAND_PageRead512(UINT32 udAddress,dataWidth *pReadBuf)
{
	UINT8 error_code = NAND_PASS ;
	UINT8 EccBuf[3];
	UINT8 SpareBuf[16];

#ifdef _NAND_DEBUG_
	DEBUG_OUT("NandReadWithEcc\n\r") ;

	if (pReadBuf == NULL) 
	{
		DEBUG_OUT("Read NAND_SW_ERR\n\r") ;
		return NAND_SW_ERR ;
	}

	if (udAddress >= FLASH_SIZE_64MB)
	{
		DEBUG_OUT("Read NAND_ADDR_OVERFLOW\n\r") ;
		return NAND_ADDR_OVERFLOW;
	}
#endif /*_NAND_DEBUG_*/

	WRITE_REG32(NFLASH_NFINTP_ADDR,1) ;
	mNandWrite_SET_CLE(READ1_CMD_00H);
	mNandWrite_SET_ALE(udAddress&0x03ffffff) ;

	if (!IsReadyToRW())
	{
		DEBUG_OUT("Read NAND_HW_ERR\n\r") ;
		return NAND_FAIL ;
	}

	EccClear();
	/**************Read main data area*********/
#ifdef _NFLASH_DMA_
	{
		UINT32 temp = 0;
		UINT32 TimeOut = 0;

		OS_DRIVER_ObtainSemaphore(DMA_SEMAPHORE_ID);  	
	#if (DMA_TYPE==TYPE_IS_MOSE_DMA)
		EnablePDClk(PD_CCKEN_DMAC_BIT);
		/*start ,byte width ,length is len, source fix ,dst increment*/
		/*temp = (1 << 0) | (0 << 4) | (SECTOR_SIZE- 1) << 8 | (1 << 20) | (0 << 21) ;  */
		temp = 0x11FF01;
		ProgramDMAChannel(NFLASH_NFDIN_ADDR + 1,(UINT32) pReadBuf,temp) ;
		#ifndef _STAND_ALONE_
		{
			UINT32 EventResult; 	   /*The 32-bit variable to where the set bits is copied*/
			UINT16 EventStatus; 	   /* Event status*/
			
			EventStatus = OS_DRIVER_WaitEventOR(PERIPH_EVENT_ID,PERIPH_DMA_EVTBIT,
							&EventResult,NAND_DMA_TIMEOUT_VALUE);  

			if (EventStatus == OS_DRIVER_WAIT_EVENT_TIMEOUT)
			{
				DEBUG_OUT("Read NAND_DMA_TIMEOUT\n\r") ;
				OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID); 
				return NAND_DMA_TIMEOUT;
			}  
		}
		#else
			temp = READ_REG32(DMA_DCR_ADDR);
			while (temp & 0x10000000)
			{
				temp = READ_REG32(DMA_DCR_ADDR);
				TimeOut++ ;
				if (TimeOut == NAND_TIMEOUT_VALUE)
				{
					OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID);
					return NAND_DMA_TIMEOUT ;
				}
			}
		#endif/*_STAND_ALONE_*/
		DisablePDClk(PD_CCKEN_DMAC_BIT);
	#elif (DMA_TYPE==TYPE_IS_GPRS_DMA)
		{
			UINT32 CtlrParam = 0, CfgrParam = 0;
			UINT32 ErrorCode ;

			/*src busrt size 0 |dst burst size 0|src width 8bits|dst width 8bits|src fix,dst inc*/
			CtlrParam = 1 << 23 ;
			/*src dst peripheral is ignored | src master 0 | dst master 1| memory to memory | 512 bytes*/
			CfgrParam = (1 << 7) | (512 << 12);

			ProgramDMAChannel(NFLASH_NFDIN_ADDR,(UINT32) pReadBuf,CtlrParam,CfgrParam);
		#ifndef  _STAND_ALONE_
			{
				UINT32 EventResult; 	   /*The 32-bit variable to where the set bits is copied*/
				UINT16 EventStatus; 	   /* Event status*/
				EventStatus = OS_DRIVER_WaitEventOR(PERIPH_EVENT_ID,PERIPH_DMA_EVTBIT,
								&EventResult,NAND_DMA_TIMEOUT_VALUE);   
				if (EventStatus == OS_DRIVER_WAIT_EVENT_TIMEOUT)
				{
					DEBUG_OUT("Roob NAND_DMA_TIMEOUT\n\r") ;
					OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID); 
					return NAND_DMA_TIMEOUT;
				}
			}
		#else
			temp = READ_REG32(DMA_ISR_ADDR);
			while ((temp & 0x4) == 0)//default to channel 2
			{
				temp = READ_REG32(DMA_ISR_ADDR);
				TimeOut++ ;
				if (TimeOut == NAND_TIMEOUT_VALUE)
				{
					WRITE_REG32(DMA_ISR_ADDR, 0x4);
					OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID);
					return NAND_DMA_TIMEOUT ;
				}
			}
			WRITE_REG32(DMA_ISR_ADDR, 0x4);
		#endif/*_STAND_ALONE_*/
		}
	#endif/*(DMA_TYPE==TYPE_IS_MOSE_DMA)*/
		OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID);
	
		GenerateEcc(&EccBuf[0]);
		
		/*start ,byte width ,length is len, source fix ,dst increment*/
		OS_DRIVER_ObtainSemaphore(DMA_SEMAPHORE_ID);  
		/*temp = (1 << 0) | (0 << 4) | (16 - 1) << 8 | (1 << 20) | (0 << 21) ;  */
	#if (DMA_TYPE==TYPE_IS_MOSE_DMA)
		EnablePDClk(PD_CCKEN_DMAC_BIT);
		temp = 0x100F01;  
		ProgramDMAChannel(NFLASH_NFDIN_ADDR + 1,(UINT32) (&SpareBuf[0]),temp) ;
		#ifndef _STAND_ALONE_
			{
				UINT32 EventResult; 	   /*The 32-bit variable to where the set bits is copied*/
				UINT16 EventStatus; 	   /* Event status*/
				
				EventStatus = OS_DRIVER_WaitEventOR(PERIPH_EVENT_ID,PERIPH_DMA_EVTBIT,
								&EventResult,NAND_DMA_TIMEOUT_VALUE);   
				if (EventStatus == OS_DRIVER_WAIT_EVENT_TIMEOUT)
				{
					DEBUG_OUT("Read NAND_DMA_TIMEOUT\n\r") ;
					OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID); 
					return NAND_DMA_TIMEOUT;
				} 
			}
		#else
			TimeOut = 0;
			temp = READ_REG32(DMA_DCR_ADDR);
			while (temp & 0x10000000)
			{
				temp = READ_REG32(DMA_DCR_ADDR);
				TimeOut++ ;
				if (TimeOut == NAND_TIMEOUT_VALUE)
				{
					OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID);
					return NAND_DMA_TIMEOUT ;
				}
			}
		#endif/*_STAND_ALONE_*/
		DisablePDClk(PD_CCKEN_DMAC_BIT);
	#elif(DMA_TYPE==TYPE_IS_GPRS_DMA)
		{
			UINT32 CtlrParam = 0, CfgrParam = 0;
			UINT32 ErrorCode ;

			/*src busrt size 0 |dst burst size 0|src width 8bits|dst width 8bits|src fix,dst inc*/
			CtlrParam = 1 << 23 ;
			/*src dst peripheral is ignored | src master 0 | dst master 1| memory to memory | 512 bytes*/
			CfgrParam = (1 << 7) | (16 << 12);

			ProgramDMAChannel(NFLASH_NFDIN_ADDR,(&SpareBuf[0]),
				CtlrParam,CfgrParam);
		#ifndef  _STAND_ALONE_
			{
				UINT32 EventResult; 	   /*The 32-bit variable to where the set bits is copied*/
				UINT16 EventStatus; 	   /* Event status*/
				
				EventStatus = OS_DRIVER_WaitEventOR(PERIPH_EVENT_ID,PERIPH_DMA_EVTBIT,
								&EventResult,NAND_DMA_TIMEOUT_VALUE);   
				if (EventStatus == OS_DRIVER_WAIT_EVENT_TIMEOUT)
				{
					DEBUG_OUT("Roob NAND_DMA_TIMEOUT\n\r") ;
					OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID); 
					return NAND_DMA_TIMEOUT;
				}
			}
		#else
			temp = READ_REG32(DMA_ISR_ADDR);
			while ((temp & 0x4) == 0)//default to channel 2
			{
				temp = READ_REG32(DMA_ISR_ADDR);
				TimeOut++ ;
				if (TimeOut == NAND_TIMEOUT_VALUE)
				{
					WRITE_REG32(DMA_ISR_ADDR, 0x4);
					OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID);
					return NAND_DMA_TIMEOUT ;
				}
			}
			WRITE_REG32(DMA_ISR_ADDR, 0x4);
		#endif/*_STAND_ALONE_*/
		}

	#endif/*(DMA_TYPE==TYPE_IS_MOSE_DMA)*/
		OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID);
		error_code = CompareEcc(&EccBuf[0],&SpareBuf[0]);
	}
#else   /*_NFLASH_DMA_*/
	{
	   	 UINT8  mi,*pd;
		 UINT16 temp = SECTOR_SIZE>>4 ;
		 pd=(UINT8 *)pReadBuf;
		 mi=0;
		do
		{
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 			
                      *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ;
 			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ;
 			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ;
 			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ;
 			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 			 	
		}while((++mi)<temp);

			GenerateEcc(&EccBuf[0]);
			pd = SpareBuf ;
		 	*pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 			
                      *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ;
 			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ;
 			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ;
 			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ;
 			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
	
		error_code = CompareEcc(&EccBuf[0],&SpareBuf[0]);
	}

#endif /*_NFLASH_DMA_*/	

	return error_code ;
}

#if 0
NAND_Ret NAND_PageRead512(UINT32 udAddress, dataWidth *pReadBuf)
{
	UINT8 ErrorCode ;

	ErrorCode = NandRead512(udAddress,512,pReadBuf);

	return ErrorCode ;
}
#endif
  NAND_Ret NANDReset(void)
{
	EnableNAND();
	NFlashReset() ;
	DisableNAND();
}