nand_drv.c

Nand Flash low driver。

		{
			UINT32 EventResult; 	   /* The 32-bit variable to where the set bits is copied*/
			UINT16 EventStatus; 	   /* Event status*/
			
			EventStatus = OS_DRIVER_WaitEventOR(PERIPH_EVENT_ID,PERIPH_DMA_EVTBIT,
							&EventResult,NAND_DMA_TIMEOUT_VALUE);   
			if (EventStatus == OS_DRIVER_WAIT_EVENT_TIMEOUT)
			{
				DEBUG_OUT("Woob NAND_DMA_TIMEOUT\n\r") ;
				OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID); 
				return NAND_DMA_TIMEOUT;
			} 
		}
		#else
			temp = READ_REG32(DMA_DCR_ADDR);
			while (temp & 0x10000000)
			{
				temp = READ_REG32(DMA_DCR_ADDR);
				TimeOut++ ;
				if (TimeOut == NAND_TIMEOUT_VALUE)
				{
					OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID);
					return NAND_DMA_TIMEOUT ;
				}
			}
		#endif/*_STAND_ALONE_*/
		DisablePDClk(PD_CCKEN_DMAC_BIT);
	#elif ( (DMA_TYPE==TYPE_IS_GPRS_DMA))
		{
			UINT32 CtlrParam = 0, CfgrParam = 0;
			UINT32 ErrorCode ;

			/*src busrt size 0 |dst burst size 0|src width 8bits|dst width 8bits|src inc,dst fix*/
			CtlrParam = 1 << 22 ;
			/*src dst peripheral is ignored | src master 0 | dst master 1| memory to memory | len bytes*/
			CfgrParam = (1 << 7) | (len << 12);
			ProgramDMAChannel((UINT32) pWrOobBuf,NFLASH_NFDOUT_ADDR,CtlrParam,CfgrParam);
		#ifndef  _STAND_ALONE_
		{
			UINT32 EventResult; 	   /* The 32-bit variable to where the set bits is copied*/
			UINT16 EventStatus; 	   /* Event status*/
			EventStatus = OS_DRIVER_WaitEventOR(PERIPH_EVENT_ID,PERIPH_DMA_EVTBIT,
							&EventResult,NAND_DMA_TIMEOUT_VALUE);   
			if (EventStatus == OS_DRIVER_WAIT_EVENT_TIMEOUT)
			{
				DEBUG_OUT("Woob NAND_DMA_TIMEOUT\n\r") ;
				OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID); 
				return NAND_DMA_TIMEOUT;
			}
		}
		#else
			temp = READ_REG32(DMA_ISR_ADDR);
			while ((temp & 0x4) == 0)//default to channel 2
			{
				temp = READ_REG32(DMA_ISR_ADDR);
				TimeOut++ ;
				if (TimeOut == NAND_TIMEOUT_VALUE)
				{
					WRITE_REG32(DMA_ISR_ADDR, 0x4);
					OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID);
					return NAND_DMA_TIMEOUT ;
				}
			}
			WRITE_REG32(DMA_ISR_ADDR, 0x4);
		#endif/*_STAND_ALONE_*/
		}
	#endif/*(DMA_TYPE==TYPE_IS_MOSE_DMA)*/
		OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID);
	}
#else    /*_NFLASH_DMA_*/
	{
		UINT16 i = 0 ;

		for (i = 0 ; i < len; i++)
			mNand_Write_Data(pWrOobBuf[i]) ;
	}
#endif  /*_NFLASH_DMA_*/

	/***this palce need to pull up the  nce**/
	mNandWrite_SET_CLE(PAGE_PRO_TRUE_CMD2);

	if (!IsReadyToRW())
	{
		DEBUG_OUT("Woob NAND_HW_ERR\n\r") ;
		return NAND_HW_ERR ;
	}

	/*if failure it need to block placement*/
	if (!IsSucessProgram())
	{
		DEBUG_OUT("Woob NAND_PRG_FAIL\n\r") ;
		return NAND_FAIL ;
	}

	return NAND_PASS;
}

 NAND_Ret NAND_SpareRead(UINT32 udAddress, UINT8 *pOobBuf,UINT32 len)
{
#ifdef _NAND_DEBUG_
	DEBUG_OUT("NandReadOOB\n\r") ;
	if ((pOobBuf == NULL) || (len > 16))
	{
		DEBUG_OUT("Roob NAND_SW_ERR\n\r") ;
		return NAND_SW_ERR ;
	}
	if (udAddress >= FLASH_SIZE_64MB)
	{
		DEBUG_OUT("Roob NAND_ADDR_OVERFLOW\n\r") ;
		return NAND_ADDR_OVERFLOW;
	}
	/* Control if the address is the buffer size is within the page*/   
	if (((udAddress % PAGE_SPARE_SIZE) + len) > PAGE_SPARE_SIZE)
	{
		DEBUG_OUT("Woob NAND_PAGE_OVERFLOW\n\r") ;
		return NAND_PAGE_OVERFLOW;
	}
#endif /*_NAND_DEBUG_*/

	//udAddress &= 0x03ffff0f ; /*a0-a3:valid address ,a4-a7:dont care*/
	WRITE_REG32(NFLASH_NFINTP_ADDR,1) ;
	mNandWrite_SET_CLE(READ2_CMD); 
	mNandWrite_SET_ALE(udAddress&0x03ffff0f) ;

	if (!IsReadyToRW())
	{
		DEBUG_OUT("Roob NAND_HW_ERR\n\r") ;
		return NAND_FAIL ;
	}

#ifdef _NFLASH_DMA_
	{
		UINT32 temp = 0;
		UINT32 TimeOut = 0;
		OS_DRIVER_ObtainSemaphore(DMA_SEMAPHORE_ID);  	 
	#if (DMA_TYPE==TYPE_IS_MOSE_DMA)
		EnablePDClk(PD_CCKEN_DMAC_BIT);
		/*start ,byte width ,length is len, source fix ,dst increment*/
		temp = 1 << 0 | 0 << 4 | (len - 1) << 8 | 1 << 20 | 0 << 21 ;  
		ProgramDMAChannel(NFLASH_NFDIN_ADDR + 1,(UINT32) pOobBuf,temp) ;

		#ifndef  _STAND_ALONE_
		{
			UINT32 EventResult; 	   /*The 32-bit variable to where the set bits is copied*/
			UINT16 EventStatus; 	   /* Event status*/
			
			EventStatus = OS_DRIVER_WaitEventOR(PERIPH_EVENT_ID,PERIPH_DMA_EVTBIT,
							&EventResult,NAND_DMA_TIMEOUT_VALUE);   
			if (EventStatus == OS_DRIVER_WAIT_EVENT_TIMEOUT)
			{
				DEBUG_OUT("Roob NAND_DMA_TIMEOUT\n\r") ;
				OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID); 
				return NAND_DMA_TIMEOUT;
			} 
		}
		#else
			temp = READ_REG32(DMA_DCR_ADDR);
			while (temp & 0x10000000)
			{
				temp = READ_REG32(DMA_DCR_ADDR);
				TimeOut++ ;
				if (TimeOut == NAND_TIMEOUT_VALUE)
				{
					OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID);
					return NAND_DMA_TIMEOUT ;
				}
			}
		#endif/*_STAND_ALONE_*/
		DisablePDClk(PD_CCKEN_DMAC_BIT);
	#elif(DMA_TYPE==TYPE_IS_GPRS_DMA)
		{
			UINT32 CtlrParam = 0, CfgrParam = 0;
			UINT32 ErrorCode ;

			/*src busrt size 0 |dst burst size 0|src width 8bits|dst width 8bits|src fix,dst inc*/
			CtlrParam = 1 << 23 ;
			/*src dst peripheral is ignored | src master 0 | dst master 1| memory to memory | 512 bytes*/
			CfgrParam = (1 << 7) | (len << 12);

			ProgramDMAChannel(NFLASH_NFDIN_ADDR,(UINT32) pOobBuf,CtlrParam,CfgrParam);
		#ifndef  _STAND_ALONE_
			{
				UINT32 EventResult; 	   /*The 32-bit variable to where the set bits is copied*/
				UINT16 EventStatus; 	   /* Event status*/

				EventStatus = OS_DRIVER_WaitEventOR(PERIPH_EVENT_ID,PERIPH_DMA_EVTBIT,
								&EventResult,NAND_DMA_TIMEOUT_VALUE);   
				if (EventStatus == OS_DRIVER_WAIT_EVENT_TIMEOUT)
				{
					DEBUG_OUT("Roob NAND_DMA_TIMEOUT\n\r") ;
					OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID); 
					return NAND_DMA_TIMEOUT;
				}
			}
		#else
			temp = READ_REG32(DMA_ISR_ADDR);
			while ((temp & 0x4) == 0)//default to channel 2
			{
				temp = READ_REG32(DMA_ISR_ADDR);
				TimeOut++ ;
				if (TimeOut == NAND_TIMEOUT_VALUE)
				{
					WRITE_REG32(DMA_ISR_ADDR, 0x4);
					OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID);
					return NAND_DMA_TIMEOUT ;
				}
			}
			WRITE_REG32(DMA_ISR_ADDR, 0x4);
		#endif/*_STAND_ALONE_*/
		}
	#endif/*(DMA_TYPE==TYPE_IS_MOSE_DMA)*/
		OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID);
	}
#else/*_NFLASH_DMA_*/
	{
		UINT8 *pd = pOobBuf ;

		 	 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 			
                      *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ;
 			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ;
 			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ;
 			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ;
 			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
	}
#endif/*_NFLASH_DMA_*/

	return NAND_PASS;
}


 NAND_Ret NAND_PageReadWithEcc(UINT32 udAddress, dataWidth *pReadBuf,UINT32 len)
{
	UINT8 error_code = NAND_PASS ;
	UINT8 EccBuf[3];

#ifdef _NAND_DEBUG_
	DEBUG_OUT("NandReadWithEcc\n\r") ;

	if ((pReadBuf == NULL) || (len > PAGE_SIZE))
	{
		DEBUG_OUT("Read NAND_SW_ERR\n\r") ;
		return NAND_SW_ERR ;
	}

	if (udAddress >= FLASH_SIZE_64MB)
	{
		DEBUG_OUT("Read NAND_ADDR_OVERFLOW\n\r") ;
		return NAND_ADDR_OVERFLOW;
	}
#endif /*_NAND_DEBUG_*/

	//udAddress &= 0x03ffffff ;
	WRITE_REG32(NFLASH_NFINTP_ADDR,1) ;
	mNandWrite_SET_CLE(READ1_CMD_00H);
	mNandWrite_SET_ALE(udAddress&0x03ffffff) ;

	if (!IsReadyToRW())
	{
		DEBUG_OUT("Read NAND_HW_ERR\n\r") ;
		return NAND_FAIL ;
	}

	EccClear();
	/**************Read main data area*********/
#ifdef _NFLASH_DMA_
	{
		UINT32 temp = 0;
		UINT32 TimeOut = 0;

		OS_DRIVER_ObtainSemaphore(DMA_SEMAPHORE_ID);  	
	#if (DMA_TYPE==TYPE_IS_MOSE_DMA)
		EnablePDClk(PD_CCKEN_DMAC_BIT);
		/*start ,byte width ,length is len, source fix ,dst increment*/
		/*temp = (1 << 0) | (0 << 4) | (SECTOR_SIZE- 1) << 8 | (1 << 20) | (0 << 21) ;  */
		temp = 0x11FF01;
		ProgramDMAChannel(NFLASH_NFDIN_ADDR + 1,(UINT32) pReadBuf,temp) ;
		#ifndef _STAND_ALONE_
		{
			UINT32 EventResult; 	   /*The 32-bit variable to where the set bits is copied*/
			UINT16 EventStatus; 	   /* Event status*/
			
			EventStatus = OS_DRIVER_WaitEventOR(PERIPH_EVENT_ID,PERIPH_DMA_EVTBIT,
							&EventResult,NAND_DMA_TIMEOUT_VALUE);  

			if (EventStatus == OS_DRIVER_WAIT_EVENT_TIMEOUT)
			{
				DEBUG_OUT("Read NAND_DMA_TIMEOUT\n\r") ;
				OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID); 
				return NAND_DMA_TIMEOUT;
			}  
		}
		#else
			temp = READ_REG32(DMA_DCR_ADDR);
			while (temp & 0x10000000)
			{
				temp = READ_REG32(DMA_DCR_ADDR);
				TimeOut++ ;
				if (TimeOut == NAND_TIMEOUT_VALUE)
				{
					OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID);
					return NAND_DMA_TIMEOUT ;
				}
			}
		#endif/*_STAND_ALONE_*/
		DisablePDClk(PD_CCKEN_DMAC_BIT);
	#elif (DMA_TYPE==TYPE_IS_GPRS_DMA)
		{
			UINT32 CtlrParam = 0, CfgrParam = 0;
			UINT32 ErrorCode ;

			/*src busrt size 0 |dst burst size 0|src width 8bits|dst width 8bits|src fix,dst inc*/
			CtlrParam = 1 << 23 ;
			/*src dst peripheral is ignored | src master 0 | dst master 1| memory to memory | 512 bytes*/
			CfgrParam = (1 << 7) | (512 << 12);

			ProgramDMAChannel(NFLASH_NFDIN_ADDR,(UINT32) pReadBuf,CtlrParam,CfgrParam);
		#ifndef  _STAND_ALONE_
			{
				UINT32 EventResult; 	   /*The 32-bit variable to where the set bits is copied*/
				UINT16 EventStatus; 	   /* Event status*/
				EventStatus = OS_DRIVER_WaitEventOR(PERIPH_EVENT_ID,PERIPH_DMA_EVTBIT,
								&EventResult,NAND_DMA_TIMEOUT_VALUE);   
				if (EventStatus == OS_DRIVER_WAIT_EVENT_TIMEOUT)
				{
					DEBUG_OUT("Roob NAND_DMA_TIMEOUT\n\r") ;
					OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID); 
					return NAND_DMA_TIMEOUT;
				}
			}
		#else
			temp = READ_REG32(DMA_ISR_ADDR);
			while ((temp & 0x4) == 0)//default to channel 2
			{
				temp = READ_REG32(DMA_ISR_ADDR);
				TimeOut++ ;
				if (TimeOut == NAND_TIMEOUT_VALUE)
				{
					WRITE_REG32(DMA_ISR_ADDR, 0x4);
					OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID);
					return NAND_DMA_TIMEOUT ;
				}
			}
			WRITE_REG32(DMA_ISR_ADDR, 0x4);
		#endif/*_STAND_ALONE_*/
		}
	#endif/*(DMA_TYPE==TYPE_IS_MOSE_DMA)*/
		OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID);
	
		GenerateEcc(&EccBuf[0]);
		
		/*start ,byte width ,length is len, source fix ,dst increment*/
		OS_DRIVER_ObtainSemaphore(DMA_SEMAPHORE_ID);  
		/*temp = (1 << 0) | (0 << 4) | (16 - 1) << 8 | (1 << 20) | (0 << 21) ;  */
	#if (DMA_TYPE==TYPE_IS_MOSE_DMA)
		EnablePDClk(PD_CCKEN_DMAC_BIT);
		temp = 0x100F01;  
		ProgramDMAChannel(NFLASH_NFDIN_ADDR + 1,(UINT32) (pReadBuf + SECTOR_SIZE),temp) ;
		#ifndef _STAND_ALONE_
			{
				UINT32 EventResult; 	   /*The 32-bit variable to where the set bits is copied*/
				UINT16 EventStatus; 	   /* Event status*/
				
				EventStatus = OS_DRIVER_WaitEventOR(PERIPH_EVENT_ID,PERIPH_DMA_EVTBIT,
								&EventResult,NAND_DMA_TIMEOUT_VALUE);   
				if (EventStatus == OS_DRIVER_WAIT_EVENT_TIMEOUT)
				{
					DEBUG_OUT("Read NAND_DMA_TIMEOUT\n\r") ;
					OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID); 
					return NAND_DMA_TIMEOUT;
				} 
			}
		#else
			TimeOut = 0;
			temp = READ_REG32(DMA_DCR_ADDR);
			while (temp & 0x10000000)
			{
				temp = READ_REG32(DMA_DCR_ADDR);
				TimeOut++ ;
				if (TimeOut == NAND_TIMEOUT_VALUE)
				{
					OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID);
					return NAND_DMA_TIMEOUT ;
				}
			}
		#endif/*_STAND_ALONE_*/
		DisablePDClk(PD_CCKEN_DMAC_BIT);
	#elif(DMA_TYPE==TYPE_IS_GPRS_DMA)
		{
			UINT32 CtlrParam = 0, CfgrParam = 0;
			UINT32 ErrorCode ;

			/*src busrt size 0 |dst burst size 0|src width 8bits|dst width 8bits|src fix,dst inc*/
			CtlrParam = 1 << 23 ;
			/*src dst peripheral is ignored | src master 0 | dst master 1| memory to memory | 512 bytes*/
			CfgrParam = (1 << 7) | (16 << 12);

			ProgramDMAChannel(NFLASH_NFDIN_ADDR,(UINT32) (pReadBuf + SECTOR_SIZE),
				CtlrParam,CfgrParam);
		#ifndef  _STAND_ALONE_
			{
				UINT32 EventResult; 	   /*The 32-bit variable to where the set bits is copied*/
				UINT16 EventStatus; 	   /* Event status*/
				
				EventStatus = OS_DRIVER_WaitEventOR(PERIPH_EVENT_ID,PERIPH_DMA_EVTBIT,
								&EventResult,NAND_DMA_TIMEOUT_VALUE);   
				if (EventStatus == OS_DRIVER_WAIT_EVENT_TIMEOUT)
				{
					DEBUG_OUT("Roob NAND_DMA_TIMEOUT\n\r") ;
					OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID); 
					return NAND_DMA_TIMEOUT;
				}
			}
		#else
			temp = READ_REG32(DMA_ISR_ADDR);
			while ((temp & 0x4) == 0)//default to channel 2
			{
				temp = READ_REG32(DMA_ISR_ADDR);
				TimeOut++ ;
				if (TimeOut == NAND_TIMEOUT_VALUE)
				{
					WRITE_REG32(DMA_ISR_ADDR, 0x4);
					OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID);
					return NAND_DMA_TIMEOUT ;
				}
			}
			WRITE_REG32(DMA_ISR_ADDR, 0x4);
		#endif/*_STAND_ALONE_*/
		}

	#endif/*(DMA_TYPE==TYPE_IS_MOSE_DMA)*/
		OS_DRIVER_ReleaseSemaphore(DMA_SEMAPHORE_ID);
		error_code = CompareEcc(&EccBuf[0],pReadBuf + SECTOR_SIZE);
	}
#else   /*_NFLASH_DMA_*/
	{
		
	   	 UINT8  mi,*pd;
		 UINT16 temp = SECTOR_SIZE>>4 ;
		 pd=(unsigned char *)pReadBuf;
		 mi=0;
		do
		{
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 			
                      *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ;
 			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ;
 			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ;
 			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ;
 			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ; 
			 *pd++ = (UINT8) (mNand_Read_Data() & 0xff) ;