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📄 combine.frp

📁 一个基于XMODEM协议的下载字库的程序
💻 FRP
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******************************************************************************************
                               PSDsoft Express Version 8.21
                                   Output of PSD Fitter
******************************************************************************************
  PROJECT    : combine                          DATE : 04/15/2006
  DEVICE     : uPSD3254A                        TIME : 11:19:22
  FIT OPTION : Keep Current
******************************************************************************************
     ==== Pin Layout for U (80-Pin TQFP) Package Type ====

                                               -----------------------------
                                              |                             |
                                   INT922_REV |1 ] pd2             adio4 [41| Address Bus a4/Data Port d4, ad4
                                       INT922 |2 ] p3_3             p3_5 [42| SDI
                                    INT922_IN |3 ] pd1             adio5 [43| Address Bus a5/Data Port d5, ad5
                                          ale |4 ] pd0              p3_6 [44| SCI
                                       EN8870 |5 ] pc7             adio6 [45| Address Bus a6/Data Port d6, ad6
                                     tdo, TDO |6 ] pc6/TDO          p3_7 [46| HOLD
                                     tdi, TDI |7 ] pc5/TDI         adio7 [47| Address Bus a7/Data Port d7, ad7
                                    USB_minus |8 ] USBm            Xtal1 [48| Xtal1
                                  _terr, TERR |9 ] pc4/TERR        Xtal2 [49| Xtal2
                                     USB_plus |10] USBp              VCC [50|  
                                              |11] N/C             adio8 [51| Address Bus a8, a8
                                              |12] VCC              p1_0 [52| CDMAONOFF
                                              |13] GND             adio9 [53| Address Bus a9, a9
                                 tstat, TSTAT |14] pc3/TSTAT        p1_1 [54| p1_1
                                        EN922 |15] pc2            adio10 [55| Address Bus a10, a10
                                     tck, TCK |16] pc1/TCK          p1_2 [56| CDMA_RxD
                                              |17] N/C            adio11 [57| Address Bus a11, a11
                                    BACKLIGHT |18] p4_7             p1_3 [58| CDMA_TxD
                                         p4_6 |19] p4_6             p1_4 [59| RED_LIGHT
                                     tms, TMS |20] pc0/TMS          p1_5 [60| GREEN_LIGHT
                                       LCD_EN |21] pa7              p1_6 [61| BEEP
                                          SCK |22] pa6             cntl0 [62| _wr
                                         p4_5 |23] p4_5            cntl2 [63| _psen
                                              |24] pa5              p1_7 [64| RUN_LIGHT
                                         p4_4 |25] p4_4            cntl1 [65| _rd
                                    KEYSELECT |26] pa4               pb7 [66| PTT
                                              |27] p4_3              pb6 [67|  
                                        Y0102 |28] pa3          Reset_In [68| _Reset_In
                                              |29] GND               GND [69|  
                                      LCD_RST |30] p4_2             Vref [70| VREF
                                     CDMA_RST |31] p4_1              N/C [71|  
                                          Y02 |32] pa2               pb5 [72|  
                                      GPS_RST |33] p4_0              pb4 [73| SW3
                                          Y01 |34] pa1               pb3 [74| SW2
                                          la0 |35] pa0              p3_0 [75| GPS_RxD
             ad0, Address Bus a0/Data Port d0 |36] adio0             pb2 [76| KC1
             ad1, Address Bus a1/Data Port d1 |37] adio1            p3_1 [77| GPS_TxD
             ad2, Address Bus a2/Data Port d2 |38] adio2             pb1 [78| KB1
             ad3, Address Bus a3/Data Port d3 |39] adio3            p3_2 [79| DTMF_INT
                                          SDO |40] p3_4              pb0 [80| KA1
                                              |                             |
                                               -----------------------------
     ==== Global Configuration ====

Data Bus                                                         : 8-Bit
Address/Data Mode                                                : Multiplexed
ALE/AS Signal                                                    : Active High
Control Signals                                                  : /WR, /RD, /PSEN
Main PSD flash memory will reside in this space at power-up      : Program space
Secondary PSD flash memory will reside in this space at power-up : Data space
Enable Chip-Select Input(/CSI)                                   : OFF
Standby Voltage Input (PC2)                                      : OFF
Standby-on Indicator (PC4)                                       : OFF
RDY/Busy function (PC3)                                          : OFF
Load Micro-Cell on                                               : edge
Security Protection                                              : OFF 

     ==== DataBus_IMC access information ====

                  CSIOP
Location     Address Offset     Register Name           Signals
--------------------------------------------------------

     ===== Resource Usage Summary =====

Total Product Terms Used:  28

Device Resources                    used / total
------------------------------------------------
Port A: (pins 35 34 32 28 26 24 22 21)
I/O Pins :                           7   /  8 
   GP I/O or Address Out        :    3 
   Peripheral I/O               :    0 
   Logic Inputs                 :    2 
   Address Latch Inputs         :    0 
   PT Dependent Latch Inputs    :    0 
   PT Dependent Register Inputs :    0 
   Combinatorial Outputs        :    2 
   Registered Outputs           :    0 
Other Information
   Microcells                   :    3   /  8 
     Micro-Cells AB :
      Buried Microcells         :    1 
      Output Microcells         :    2 
   Product Terms                :    7   /  24
   Control Product Terms        :    2   /  34

Port B: (pins 80 78 76 74 73 72 67 66)
I/O Pins :                           6   /  8 
   GP I/O or Address Out        :    6 
   Logic Inputs                 :    0 
   Address Latch Inputs         :    0 
   PT Dependent Latch Inputs    :    0 
   PT Dependent Register Inputs :    0 
   Combinatorial Outputs        :    0 
   Registered Outputs           :    0 
Other Information
   Microcells                   :    3   /  8 
     Micro-Cells AB :
      Buried Microcells         :    3 
      Output Microcells         :    0 
     Micro-Cells BC :
      Buried Microcells         :    0 
      Output Microcells         :    0 
   Product Terms                :    7   /  24
   Control Product Terms        :    0   /  34

Port C: (pins 20 16 15 14 9 7 6 5)
I/O Pins :                           8   /  8 
   GP I/O or Address Out        :    0 
   Logic Inputs                 :    0 
   Address Latch Inputs         :    0 
   PT Dependent Latch Inputs    :    0 
   PT Dependent Register Inputs :    0 
   JTAG signals                 :    6 
   Standby Voltage Input        :    0 
   Rdy/Bsy signal               :    0 
   Standby On Indicator         :    0 
   Combinatorial Outputs        :    2 
   Registered Outputs           :    0 
Other Information
   Microcells                   :    2   /  8 
     Micro-Cells BC :
      Buried Microcells         :    0 
      Output Microcells         :    2 
   Product Terms                :    9   /  32
      Allocated locally         :    5 
      Allocated to other port   :    4 
   Control Product Terms        :    3   /  34
      Allocated locally         :    2 
      Allocated to other port   :    1 

Port D: (pins 4 3 1)
I/O Pins :                           3   /  3 
   GP I/O or Address Out        :    0 
   Logic Inputs                 :    1 
   Chip-Select Input            :    0 
   Clock Input                  :    0 
   Control Signal Input         :    1 
   Fast Decoding Outputs        :    1 
Other Information
   Product Terms                :    1   /  3 
   Control Product Terms        :    1   /  3 


     ==== OMC Resource Assignment ====

  Resources           PT             User
  Used                Allocation     Name
 ---------------------------------------------------------
Micro-Cell AB :
  Micro-Cells 0       Yes            rs0_0 => Combinatorial
  Micro-Cells 3        -             Y0102 (mcellab3)  => Combinatorial
  Micro-Cells 7       Yes            LCD_EN (mcellab7)  => Combinatorial

Micro-Cell BC :
  Micro-Cells 2        -             EN922 (mcellbc2)  => Combinatorial
  Micro-Cells 7        -             EN8870 (mcellbc7)  => Combinatorial

External Chip Select :
  Fast Chip Select 2   -             INT922_REV (ecsd2)  => Fast Decoding


     ========= Equations =========

DPLD          EQUATIONS :
=======================
     fs0 = !pdn & !a15;

     fs1 = !pdn & a15;

     csiop = !pdn & !a15 & !a14 & !a13 & !a12 & !a11 & !a10 & !a9 & !a8;

     rs0 = rs0_0.FB;

     jtagsel = !_reset;

PORTA         EQUATIONS :
=======================
     rs0_0 = (!pdn & !a15 & a14)
          # (!pdn & !a15 & a13)
          # (!pdn & !a15 & a12)
          # (!pdn & !a15 & a11)
          # (!pdn & !a15 & a10)
          # (!pdn & !a15 & a9)
          # (!pdn & a15 & !a14 & !a13 & !a12 & !a11 & !a10 & !a9);

     Y01.LE = 1;

     Y02.LE = 1;

     !Y0102 = Y02 & Y01;
     Y0102.OE = 1;

     !LCD_EN = (!_rd & !a15 & !a14 & !a13 & !a12 & !a11 & !a10 & !a9 & a8 & !a7 & !a6 & !a5 & !a4 & !a3 & !a2 & !a1)
          # (!_rd & !a15 & !a14 & !a13 & !a12 & !a11 & !a10 & !a9 & a8 & !a7 & !a6 & !a5 & !a4 & !a3 & !a2 & !a0)
          # (!_wr & !a15 & !a14 & !a13 & !a12 & !a11 & !a10 & !a9 & a8 & !a7 & !a6 & !a5 & !a4 & !a3 & !a2 & !a1)
          # (!_wr & !a15 & !a14 & !a13 & !a12 & !a11 & !a10 & !a9 & a8 & !a7 & !a6 & !a5 & !a4 & !a3 & !a2 & !a0);
     LCD_EN.OE = 1;

PORTB         EQUATIONS :
=======================
PORTC         EQUATIONS :
=======================
     !EN922 = (!_rd & !a15 & !a14 & !a13 & !a12 & !a11 & !a10 & !a9 & a8 & !a7 & !a6 & !a5 & a4)
          # (!_rd & !a15 & !a14 & !a13 & !a12 & !a11 & !a10 & !a9 & a8 & !a7 & !a6 & !a5 & a3 & a2)
          # (!_rd & !a15 & !a14 & !a13 & !a12 & !a11 & !a10 & !a9 & a8 & !a7 & !a6 & !a5 & a3 & a1);
     EN922.OE = 1;

     EN8870 = (!_rd & !a15 & !a14 & !a13 & !a12 & !a11 & !a10 & !a9 & a8 & !a7 & !a6 & !a5 & !a4 & !a3 & a2 & !a1 & a0)
          # (!_rd & !a15 & !a14 & !a13 & !a12 & !a11 & !a10 & !a9 & a8 & !a7 & !a6 & !a5 & !a4 & !a3 & a2 & a1 & !a0);
     EN8870.OE = 1;

PORTD         EQUATIONS :
=======================
     INT922_REV = !INT922_IN;
     INT922_REV.OE = 1;

                                      ---  End  ---

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