📄 supported_booting_methods.html
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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html><head> <title></title> <link rel="stylesheet" media="screen" type="text/css" href="./style.css" /> <link rel="stylesheet" media="screen" type="text/css" href="./design.css" /> <link rel="stylesheet" media="print" type="text/css" href="./print.css" /> <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /></head><body><a href=start.html>start</a></br><div class="toc"><div class="tocheader toctoggle" id="toc__header">Table of Contents</div><div id="toc__inside"><ul class="toc"><li class="level1"><div class="li"><span class="li"><a href="#booting_methods" class="toc">Booting Methods</a></span></div><ul class="toc"><li class="level2"><div class="li"><span class="li"><a href="#ldr_images" class="toc">LDR Images</a></span></div></li></ul></li><li class="level1"><div class="li"><span class="li"><a href="#flash_memory" class="toc">Flash Memory</a></span></div><ul class="toc"><li class="level2"><div class="li"><span class="li"><a href="#nor_flash" class="toc">NOR Flash</a></span></div></li><li class="level2"><div class="li"><span class="li"><a href="#spi_serial_flash" class="toc">SPI Serial Flash</a></span></div></li><li class="level2"><div class="li"><span class="li"><a href="#nand_flash" class="toc">NAND Flash</a></span></div></li></ul></li></ul></div></div><h1><a name="booting_methods" id="booting_methods">Booting Methods</a></h1><div class="level1"><p> The Blackfin processor supports many different methods to load and execute U-Boot, depending on the specific processor variant (check the data sheet to see which options are available). Booting from External Flash, SPI and TWI Memory or from SPI, TWI, and UART Host Devices are all possible. Once U-Boot is loaded, the kernel can be loaded in a variety of methods.</p><p>All Blackfin processors contains a small on-chip boot kernel (Boot-ROM), which configures the appropriate peripheral for booting. The Boot-ROM has nothing to do with the Linux kernel or with U-Boot, it is just available to load the initial image. The Blackfin processor has seven mechanisms for automatically loading and executing memory after a reset.</p><ul><li class="level1"><div class="li"> Execute from 16-bit external memory at <code>0×20000000</code>(Bypass Boot ROM)</div></li><li class="level1"><div class="li"> Load and execute LDR image from 8-bit or 16-bit memory (EPROM/flash)</div></li><li class="level1"><div class="li"> Load and execute LDR image from serial SPI memory (EEPROM/flash)</div></li><li class="level1"><div class="li"> Load and execute LDR image from SPI host (slave mode)</div></li><li class="level1"><div class="li"> Load and execute LDR image from serial TWI memory (EEPROM/flash)</div></li><li class="level1"><div class="li"> Load and execute LDR image from TWI host (slave mode)</div></li><li class="level1"><div class="li"> Load and execute LDR image from UART host (slave mode)</div></li></ul><p> </p></div><!-- SECTION [1-1381] --><h2><a name="ldr_images" id="ldr_images">LDR Images</a></h2><div class="level2"><p> An LDR image is an image format that the Blackfin Boot ROM supports. On the host, is it normally represented by in an Intel hex-32 format files. The files support 8-bit-wide PROMs and are used with an industry-standard PROM programmer to program memory devices. One file contains data for the whole series of memory chips to be programmed. More information can be found on the <a href="http://www.analog.com/UploadedFiles/Associated_Docs/8055513140_loader_man.pdf" class="urlextern" title="http://www.analog.com/UploadedFiles/Associated_Docs/8055513140_loader_man.pdf" rel="nofollow">VDSP++ 4.0 Loader Manual</a> or in the ADI App Note<a href="http://www.analog.com/UploadedFiles/Application_Notes/304621268EE240v03.pdf" class="urlextern" title="http://www.analog.com/UploadedFiles/Application_Notes/304621268EE240v03.pdf" rel="nofollow">Blackfin Booting Process</a>.</p><p>There is an Linux host based tool, which can turn U-Boot into a LDR file, which the Blackfin on chip Boot-ROM can load and execute. This allows U-boot to boot from the various LDR Boot methods. For more information, see the <a href="loading_u-boot.html" class="wikilink1" title="loading_u-boot.html">loading u-boot</a> page.</p></div><!-- SECTION [1382-2268] --><h1><a name="flash_memory" id="flash_memory">Flash Memory</a></h1><div class="level1"><p> <a href="http://en.wikipedia.org/wiki/Flash%20memory" class="interwiki iw_wp" title="http://en.wikipedia.org/wiki/Flash%20memory">Flash memory</a> is a form of non-volatile memory that can be electrically erased and reprogrammed. Normally flash is used to store both U-Boot and the kernel images, however they do not need to be stored in the same place. Since on-chip Boot-ROM and U-Boot only support two common booting methods, (Parallel NOR Flash, and SPI Flash), the kernel can be on a different flash device, on the network, or other external device (including Compact Flash Card, IDE Hard Drive, etc), depending on the drivers that are compiled into U-Boot.</p><p>There are three issues to look at when looking at booting, and persistent storage:</p><ul><li class="level1"><div class="li"> The ability of the on-chip Boot-ROM to load and execute U-Boot</div></li><li class="level1"><div class="li"> The ability of U-Boot to load and execute the kernel</div></li><li class="level1"><div class="li"> The ability of the kernel to read and write a Flash File System (if desired).</div></li></ul></div><!-- SECTION [2269-3126] --><h2><a name="nor_flash" id="nor_flash">NOR Flash</a></h2><div class="level2"><p> On the BF537-STAMP, and other development boards, there is a 4Mbyte NOR Flash. U-Boot is loaded into these flashes, with the expectation that the on-chip Boot ROM is bypassed, and that on RESET, the Program Counter is loaded with <code>0×20000000</code>, and instructions are decoded from the 16-bit external memory.</p><p>This is very easy, and simple to debug (which is why we did it), but has the disadvantage of consuming 4Meg of asynchronous memory space (on the BF537, this is all the asynchronous memory space), and requiring a little glue logic, to emulate the extra address bits which do not come out of the Blackfin processor. This is why other boot modes are supported.</p><p>With NOR Flash, the on-chip Boot ROM is bypassed, and U-Boot and the kernel has drivers for many different types of parallel NOR Flash, with support for different file systems.</p></div><!-- SECTION [3127-3995] --><h2><a name="spi_serial_flash" id="spi_serial_flash">SPI Serial Flash</a></h2><div class="level2"><p> Companies like STmicroelectronics manufacture <a href="http://www.st.com/stonline/products/families/memories/fl_ser/sf_code.htm" class="urlextern" title="http://www.st.com/stonline/products/families/memories/fl_ser/sf_code.htm" rel="nofollow">SPI Flash</a> which span sizes from 512Kb (64kBytes) to 128Mb (16Mbytes). </p><p>With SPI Serial Flash:</p><ul><li class="level1"><div class="li"> the on-chip Boot-ROM can load an initial U-Boot image, (requires U-Boot to be built as a LDR image)</div></li><li class="level1"><div class="li"> U-Boot includes SPI drivers which allow the kernel/ramfs images to be loaded</div></li><li class="level1"><div class="li"> the Linux kernel includes SPI Flash drivers, to use the flash as a root file system</div></li></ul></div><!-- SECTION [3996-4517] --><h2><a name="nand_flash" id="nand_flash">NAND Flash</a></h2><div class="level2"><p>NAND Flash is the ideal solution for applications requiring a large amount of data storage memory, from 128Mbit (16MByte) up to 8Gbit(1MByte) and above. It is the flash of choice for applications like digital cameras and camcorders, PDAs, or <acronym title="Motion Picture Experts Group Layer 3">MP3</acronym> players. Again, STMicroelectronics has a family of <a href="http://www.st.com/stonline/products/families/memories/fl_nand/index.htm" class="urlextern" title="http://www.st.com/stonline/products/families/memories/fl_nand/index.htm" rel="nofollow">NAND Flash</a> devices.</p><p>With NAND Flash, </p><ul><li class="level1"><div class="li"> the on-chip Boot-ROM <strong>CAN NOT</strong> boot from NAND, so a small SPI EEPROM is required to load U-Boot</div></li><li class="level1"><div class="li"> U-Boot includes NAND drivers which allow the kernel/ramfs images to be loaded</div></li><li class="level1"><div class="li"> the Linux kernel includes NAND Flash drivers, to use the flash as a root file system</div></li></ul><p> Some details on Connecting NAND to Blackfin</p><ul><li class="level1"><div class="li"> <a href="blackfin_nand_flash_mtd_driver.html" class="wikilink1" title="blackfin_nand_flash_mtd_driver.html">example schematic</a></div></li><li class="level1"><div class="li"> <a href="compactflash_ide_ata_nand_flash_-_interface_card.html" class="wikilink1" title="compactflash_ide_ata_nand_flash_-_interface_card.html">example card</a></div></li><li class="level1"><div class="li"> <a href="using_nand_flash_with_u-boot_and_linux_kernel.html" class="wikilink1" title="using_nand_flash_with_u-boot_and_linux_kernel.html">example software configuration</a></div></li></ul></div><!-- SECTION [4518-] --></body></html>⌨️ 快捷键说明
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