📄 blackfin_nand_flash_mtd_driver.html
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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html><head> <title></title> <link rel="stylesheet" media="screen" type="text/css" href="./style.css" /> <link rel="stylesheet" media="screen" type="text/css" href="./design.css" /> <link rel="stylesheet" media="print" type="text/css" href="./print.css" /> <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /></head><body><a href=start.html>start</a></br><div class="toc"><div class="tocheader toctoggle" id="toc__header">Table of Contents</div><div id="toc__inside"><ul class="toc"><li class="level1"><div class="li"><span class="li"><a href="#introduction" class="toc">Introduction</a></span></div></li><li class="level1"><div class="li"><span class="li"><a href="#example_interfacing_a_nand_flash_to_blackfin_s_ebiu" class="toc">Example Interfacing a NAND Flash to Blackfin's EBIU</a></span></div></li><li class="level1"><div class="li"><span class="li"><a href="#enabling_the_blackfin_nand_mtd_flash_driver" class="toc">Enabling the Blackfin NAND mtd flash driver</a></span></div></li><li class="level1"><div class="li"><span class="li"><a href="#enabling_yaffs_file_system_driver" class="toc">Enabling YAFFS file system driver</a></span></div></li><li class="level1"><div class="li"><span class="li"><a href="#mounting_a_nand_flash_device" class="toc">Mounting a NAND flash device</a></span></div></li><li class="level1"><div class="li"><span class="li"><a href="#utilizing_yaffs_file_system_utilities" class="toc">Utilizing YAFFS file system utilities</a></span></div></li></ul></div></div><h1><a name="introduction" id="introduction">Introduction</a></h1><div class="level1"><p> <a href="media/mtd_logo3.png" class="media" target="_blank" title="mtd_logo3.png"><img src="media/mtd_logo3.png" class="media" alt="" /></a></p><p>For a complete set of general documentation please visit here:</p><p><a href="http://www.linux-mtd.infradead.org/" class="urlextern" title="http://www.linux-mtd.infradead.org/" rel="nofollow">Memory Technology Devices</a></p></div><!-- SECTION [1-186] --><h1><a name="example_interfacing_a_nand_flash_to_blackfin_s_ebiu" id="example_interfacing_a_nand_flash_to_blackfin_s_ebiu">Example Interfacing a NAND Flash to Blackfin's EBIU</a></h1><div class="level1"><p> This interface is designed to work with NAND Flash devices that support the ‘Chip Enable Don鈥檛 Care’ feature.</p><p><strong>Chip Enable Don鈥檛 Care</strong></p><p>In NAND devices with a standard Chip Enable signal, the data transfer of any read operation is aborted if Chip Enable goes High. For devices with the Chip Enable Don鈥榯 Care feature, the Chip Enable can be used to select the NAND Flash, without affecting any current operation, as Chip Enable transitions during the data transfer of a read operation do not stop the operation. Chip Enable can be de-asserted during read, program or erase cycles, without interrupting the operation. This allows the microcontroller to share the I/O bus with other devices.</p><p>Example Device: </p><ul><li class="level1"><div class="li"> NAND128W3A2BN6E (ST Microelectronics)<br/></div></li></ul><p><br/></p><table class="inline"> <tr> <th> Blackfin </th><th> </th><th> NAND Flash </th> </tr> <tr> <td> A1 </td><td> → </td><td> Address Latch </td> </tr> <tr> <td> A2 </td><td> → </td><td> Command Latch </td> </tr> <tr> <td> AMSx </td><td> → </td><td> Chip Enable </td> </tr> <tr> <td> /ARE </td><td> → </td><td> NAND Read </td> </tr> <tr> <td> /AWE </td><td> → </td><td> NAND Write </td> </tr> <tr> <td> PFx </td><td> ← </td><td> NAND Busy </td> </tr> <tr> <td> PFx </td><td> → </td><td> NAND Write Protect </td> </tr> <tr> <td> D[0..7] </td><td> ↔ </td><td> NAND I/O[0..7] </td> </tr></table><br /><p> <a href="media/nand_schematic_lowres.png" class="media" target="_blank" title="nand_schematic_lowres.png"><img src="media/nand_schematic_lowres.png" class="media" alt="" /></a></p><p>While it is possible, and may seem intuitive to connect the NAND Busy to the Blackfin’s ARDY input, it is normally connected to a GPIO since we do not want a “Busy Wait”. Asserting ARDY will stall the processor, and not allow it to do other things while the flash is busy. Connecting it to a GPIO allows the Blackfin to do other things while the the NAND Busy is asserted.</p><p> </p></div><!-- SECTION [187-1879] --><h1><a name="enabling_the_blackfin_nand_mtd_flash_driver" id="enabling_the_blackfin_nand_mtd_flash_driver">Enabling the Blackfin NAND mtd flash driver</a></h1><div class="level1"><ul><li class="level1"><div class="li"> Enabling MTD driver <pre class="code">== Select Memory Technology Devices (MTD) == Enable - Memory Technology Device (MTD) support Enable - MTD partitioning support Enable - Direct char device access to MTD device Enable - Caching block device access to MTD device</pre></div></li><li class="level2"><div class="li"> Enabling NAND flash driver <pre class="code">== Select NAND Flash Device Drivers == Enable - NAND Device Support Enable - NAND Flash device for BF537 STAMP board</pre></div></li></ul></div><!-- SECTION [1880-2402] --><h1><a name="enabling_yaffs_file_system_driver" id="enabling_yaffs_file_system_driver">Enabling YAFFS file system driver</a></h1><div class="level1"><pre class="code">== Select File Systems == Select - Miscellaneous filesystems Enable 鈥⌨️ 快捷键说明
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