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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html><head> <title></title> <link rel="stylesheet" media="screen" type="text/css" href="./style.css" /> <link rel="stylesheet" media="screen" type="text/css" href="./design.css" /> <link rel="stylesheet" media="print" type="text/css" href="./print.css" /> <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /></head><body><a href=start.html>start</a></br><div class="toc"><div class="tocheader toctoggle" id="toc__header">Table of Contents</div><div id="toc__inside"><ul class="toc"><li class="level1"><div class="li"><span class="li"><a href="#re_programming_the_cpld_on_the_bf533-stamp" class="toc">(Re)programming the CPLD on the BF533-STAMP</a></span></div><ul class="toc"><li class="level2"><div class="li"><span class="li"><a href="#part_1mofifying_the_program" class="toc">Part 1: Mofifying the program</a></span></div><ul class="toc"><li class="level3"><div class="li"><span class="li"><a href="#method_1compiling_using_wincupl" class="toc">Method 1: Compiling using WinCUPL</a></span></div></li><li class="level3"><div class="li"><span class="li"><a href="#method_2compiling_from_the_command-line" class="toc">Method 2: Compiling from the command-line</a></span></div></li></ul></li><li class="level2"><div class="li"><span class="li"><a href="#part_2re-programming_the_cpld" class="toc">Part 2: Re-programming the CPLD</a></span></div></li></ul></li></ul></div></div><h1><a name="re_programming_the_cpld_on_the_bf533-stamp" id="re_programming_the_cpld_on_the_bf533-stamp">(Re)programming the CPLD on the BF533-STAMP</a></h1><div class="level1"><p> The routing of Programmable Flag pins PF0 to PF8 to/from the peripherals is taken care of by a Complex Programmable Logic Device (CPLD). The particular chip used is an <a href="http://www.atmel.com/dyn/products/product_card.asp?part_id=2128" class="urlextern" title="http://www.atmel.com/dyn/products/product_card.asp?part_id=2128" rel="nofollow">ATF1504ASV</a>. The default routing (see <a href="http://blackfin.uclinux.org/frs/download.php/420/stamp_schematics_v1.2.pdf" class="urlextern" title="http://blackfin.uclinux.org/frs/download.php/420/stamp_schematics_v1.2.pdf" rel="nofollow">stamp_schematics_v1.2.pdf</a>) is as follows: </p><table class="inline"> <tr> <th class="leftalign"> From </th><th class="leftalign"> To </th> </tr> <tr> <td class="leftalign"> PF0,PF1 </td><td> Bank Select </td> </tr> <tr> <td class="leftalign"> PF2 </td><td class="leftalign"> <acronym title="Graphical User Interface">GUI</acronym>_LED1 </td> </tr> <tr> <td class="leftalign"> PF3 </td><td class="leftalign"> <acronym title="Graphical User Interface">GUI</acronym>_LED2 </td> </tr> <tr> <td class="leftalign"> PF4 </td><td class="leftalign"> <acronym title="Graphical User Interface">GUI</acronym>_LED3 </td> </tr> <tr> <td> <acronym title="Graphical User Interface">GUI</acronym>_BUT1 </td><td class="leftalign"> PF5 </td> </tr> <tr> <td> <acronym title="Graphical User Interface">GUI</acronym>_BUT2 </td><td class="leftalign"> PF6 </td> </tr> <tr> <td class="leftalign"> LAN_IRQ </td><td class="leftalign"> PF7 </td> </tr> <tr> <td> <acronym title="Graphical User Interface">GUI</acronym>_BUT3 </td><td class="leftalign"> PF8 </td> </tr> <tr> <td class="leftalign"> RTS </td><td class="leftalign"> CTS </td> </tr></table><br /><p> This particular pin assignment may not be suitable for every purpose. For example, the use of PF7 for LAN interrupt handling makes it impossible to use the PPI for >12 bit transfers, because PF7 is also connected to the 13th bit of the PPI bus. In that case, changing that particular assignment from PF7 to another pin (e.g. PF2) may be necessary. </p><p>The original CPLD program for the BF533-STAMP, which can be downloaded from <a href="http://blackfin.uclinux.org/frs/download.php/39/stamp_cpld_v2.zip" class="urlextern" title="http://blackfin.uclinux.org/frs/download.php/39/stamp_cpld_v2.zip" rel="nofollow">stamp_cpld_v2.zip</a>, has been created using Prochip Designer. This commercial program only has a 30 day trial period. Luckily, modification and re-programming of the CPLD program can be performed using the free WinCupl program and the free Atmel-<acronym title="Internet Service Provider">ISP</acronym> program. These programs can be downloaded from <a href="http://www.atmel.com/dyn/products/tools_card.asp?tool_id=2759" class="urlextern" title="http://www.atmel.com/dyn/products/tools_card.asp?tool_id=2759" rel="nofollow">WinCupl page</a> and <a href="http://www.atmel.com/dyn/products/tools_card.asp?tool_id=2757" class="urlextern" title="http://www.atmel.com/dyn/products/tools_card.asp?tool_id=2757" rel="nofollow">Atmel-ISP page</a> respectively.</p></div><!-- SECTION [1-1696] --><h2><a name="part_1mofifying_the_program" id="part_1mofifying_the_program">Part 1: Mofifying the program</a></h2><div class="level2"><p> First, unzip (with full path) stamp_cpld_v2.zip to the root of C:, thus creating files in the C:\stamp_cpld_v2 directory. If you choose another folder, the WinCUPL program may give an error message.</p><p>Start WinCUPL and open C:\stamp_cpld_v2\code.PLD. You can modify and save the code. After modification, it has to be re-compiled. This can be done from inside WinCUPL or from the command-line:</p><p>Besides the main program (wincupl.exe), WinCUPL (5.30.4) contains two important command-line programs: </p><ul><li class="level1"><div class="li"> Wincupl\Shared\cupl.exe</div></li><li class="level1"><div class="li"> Wincupl\WinCupl\Fitters\fit1504.exe</div></li></ul><p> A device-dependent compile (key F9) from WinCupl creates a .JED (Jedec) file from the .PLD file by running these two programs in sequence:</p><p><em>FILENAME.PLD</em> → CUPL.EXE → <em>FILENAME.TT2</em> → FIT1504.EXE → <em>FILENAME.JED</em></p><p>As a by-product, a file named FILENAME.FIT is created (amongst others). This filename is an extensive log file. You can use it to verify that the .JED file compilation has been performed using the right parameters.</p><p>The first method, compiling using WinCUPL itself, has one drawback: the outputs of a ATF15xx CPLD default to a slow slew-rate. The slew-rate can be tuned using a parameter called ‘output_fast’. Unfortunately, there is no (reliable) way of passing this parameter to fit1504 from inside WinCupl. If you need this, you will have tp use the second method, using the tools directly from the command line. Whether your board needs some ports at a high slew-rate will probably depend on the clockspeed. If you are in doubt, just use the second method (or try the first and re-program again using the second if not satisfied).</p></div><!-- SECTION [1697-3370] --><h3><a name="method_1compiling_using_wincupl" id="method_1compiling_using_wincupl">Method 1: Compiling using WinCUPL</a></h3><div class="level3"><p>In WinCUPL, the device should be hand-selected to read “ATF1504AS TQPF44-<acronym title="Internet Service Provider">ISP</acronym>“, where the -<acronym title="Internet Service Provider">ISP</acronym> part of the name is very important. This is done in menu Options→ Devices (device type is TQFP). The box “Device in file” must not be checked. This overrides the “Device f1504tqfp44” setting in code.PLD.</p><p>When you compile (menu Run → Device Dependent Compile (F9) ), the compilation is performed with option “-JTAG ON” instead of “-JTAG OFF” because of the -<acronym title="Internet Service Provider">ISP</acronym> device type. This is important, because otherwise the JTAG port will be disabled after flashing the CPLD.</p><p>If you get no errors, you now have the code.JED file and the code.FIT file that you can open in notepad to verify the compilation.</p></div><!-- SECTION [3371-4113] --><h3><a name="method_2compiling_from_the_command-line" id="method_2compiling_from_the_command-line">Method 2: Compiling from the command-line</a></h3><div class="level3"><p>Assuming your command-line tools have been installed to C:\APL\Wincupl\Shared\cupl.exe and C:\APL\Wincupl\WinCupl\Fitters\fit1504.exe, the compilation is performed in two steps:</p></div><h4><a name="running_cupl" id="running_cupl">1. Running CUPL</a></h4><div class="level4"><pre class="code">C:\stamp_cpld_v2>c:\APL\Wincupl\Shared\cupl.exe -jxfu c:\APL\Wincupl\Shared\cupl.dl f1504isptqfp44 code.PLD</pre><p> If you get no errors, you now have the code.TT2 file, which forms the input file for the next step. This .TT2 file is exactly the same as generated by WinCUPL, so you can skip this step if you have tried method 1 first.</p></div><h4><a name="running_fit1504" id="running_fit1504">2. Running FIT1504</a></h4><div class="level4"><pre class="code">C:\stamp_cpld_v2>c:\APL\Wincupl\WinCupl\Fitters\fit1504 code.tt2 -CUPL -dev P1504T44 -JTAG ON -output_fast PF8,PF7,PF6,PF5,GUI_LED3,GUI_LED2,GUI_LED1,FLASH_CS,FLASH_A20,FLASH_A19,EXP_AMS3,EXP_AMS2,EXP_AMS1,EXP_AMS0,ETHERNET_CS</pre><p> If you get no errors, you now have the code.JED file and the code.FIT file to verify the compilation. The “-output_fast” parameter, followed by a comma separated list (no spaces in between!) of all the outputs you want at a high slew-rate, is effectively the only difference between method 1 and method 2.</p></div><!-- SECTION [4114-5270] --><h2><a name="part_2re-programming_the_cpld" id="part_2re-programming_the_cpld">Part 2: Re-programming the CPLD</a></h2><div class="level2"><p> Start the Atmel <acronym title="Internet Service Provider">ISP</acronym> program and open the code.CHN file in the C:\stamp_cpld_v2 directory. If it is missing, it may have been deleted by WinCUPL: just get it back from the original ZIP file.</p><p>Make sure the Port setting (e.g. LPT1) and cable type (e.g. Atmel <acronym title="Internet Service Provider">ISP</acronym>) is set correctly and the STAMP is connected using its J5 (CPLD JTAG) connector. Press Run to program/verify the CPLD.</p><p> <acronym title="Internet Service Provider">ISP</acronym><em class="u">DO NOT</em>“” </p><p>If you want to do a non-destructive test first, doubleclick on the text inside the “Chain File Hierarchy”, change the “Jtag instruction” from “Program/Verify” to “Load” and type another name in the “Jedec file” field. When you run the program now, it reads the CPLD and creates the a .JED file with the name you specified. If you perform multiple reads, a program like ‘diff’ will reveal any differences - only the timestamp should be different. If each read creates a different .JED file, the JTAG cable may be too long, creating errors.</p></div><!-- SECTION [5271-] --></body></html>⌨️ 快捷键说明
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