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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"><html><head> <title></title> <link rel="stylesheet" media="screen" type="text/css" href="./style.css" /> <link rel="stylesheet" media="screen" type="text/css" href="./design.css" /> <link rel="stylesheet" media="print" type="text/css" href="./print.css" /> <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /></head><body><a href=start.html>start</a></br><h2><a name="glossary" id="glossary">Glossary</a></h2><div class="level2"><ul><li class="level1"><div class="li"> <strong>A/D</strong> - Analog to Digital.</div></li><li class="level1"><div class="li"> <strong>ADC </strong>- Analog to Digital converter.</div></li><li class="level1"><div class="li"> <strong>BASH</strong> - Bourne Again Shell. This is a revision of the Bourne shell. It is the standard GNU/Linux command interpreter.</div></li><li class="level1"><div class="li"> <strong>CoLinux</strong> - means to provide Linux services on a Windows host.</div></li><li class="level1"><div class="li"> <strong>Companding</strong> - The process of logarithmically encoding and decoding data to minimize the number of bits that must be sent.</div></li><li class="level1"><div class="li"> <strong>CPLD</strong> - Complex Programmable Logic Device. These devices are integrated circuits which can be programmed to implement custom logic circuits.</div></li><li class="level1"><div class="li"> <strong>CPP</strong> - The GNU preprocessor.</div></li><li class="level1"><div class="li"> <strong>Cross Compiling</strong> - Compiling source code on one platform (e.g. Linux x86 desktop) for execution on another platform (e.g. Blackfin). </div></li><li class="level1"><div class="li"> <strong>D/A</strong> - Digital to Analog.</div></li><li class="level1"><div class="li"> <strong>DAC</strong> - Digital to Analog converter.</div></li><li class="level1"><div class="li"> <strong>DDD</strong> - Data Display Debugger. A graphical front-end for command-line debuggers such as gdb.</div></li><li class="level1"><div class="li"> <strong>DHCP</strong> - Dynamic Host Configuration Protocol. A communications protocol that assigns IP addresses to machines when they are connected to the network.</div></li><li class="level1"><div class="li"> <strong>DMA</strong> - Direct Memory Access. A way of moving data between system devices and memory in which the data is transferred through a DMA port without involving the processor.</div></li><li class="level1"><div class="li"> <strong>DMA External Bus (DEB)</strong> - A bus that provides a means for DMA channels to off-chip memory.</div></li><li class="level1"><div class="li"> <strong>DRAM</strong> - Dynamic Random Access Memory. A type of memory that has to be refreshed periodically to keep from loosing its values.</div></li><li class="level1"><div class="li"> <strong>EAB</strong> - External Access Bus. A bus mastered by the core memory management unit to access external memory.</div></li><li class="level1"><div class="li"> <strong>EBIU</strong> - External Bus Controller. A component that provides arbitration between the External Access Bus (EAB) and the DMA External Bus (DEB), granting at most one requester per cycle.</div></li><li class="level1"><div class="li"> <strong>ELF</strong> - Executable and Linkable Format. The Linux standard binary format.</div></li><li class="level1"><div class="li"> <strong>EPROM</strong> - Erasable Programmable Read-Only Memory. Memory that retains its programmed values without an external power supply. This memory may be erased by ultraviolet light or an electric signal in the case of Electronically Erasable PROM (EEPROM).</div></li><li class="level1"><div class="li"> <strong>Ethernet</strong> - A physical layer protocol based on IEEE standards.</div></li><li class="level1"><div class="li"> <strong>FFT</strong> - Fast Fourier Transform. An algorithm for computing the Fourier transform of a set of discrete data values.</div></li><li class="level1"><div class="li"> <strong>Flash Memory</strong> - Non-volatile, erasable memory in which erasing can only be done in blocks or for the entire chip.</div></li><li class="level1"><div class="li"> <strong>GAS</strong> - The GNU Assembler, also called AS.</div></li><li class="level1"><div class="li"> <strong>GCC</strong> - The GNU Compiler.</div></li><li class="level1"><div class="li"> <strong>GDB</strong> - The GNU debugger.</div></li><li class="level1"><div class="li"> <strong>Glueless</strong> - No external hardware is required.</div></li><li class="level1"><div class="li"> <strong>GNU</strong> - GNU’s Not Unix. A project of the Free Software Foundation to provide free software for UNIX鈥憀ike environments.</div></li><li class="level1"><div class="li"> <strong>I/O</strong> - A short form of input/output.</div></li><li class="level1"><div class="li"> <strong>IDE</strong> - Integrated Development Environment. This is an application which brings together all the components needed to create programs. Tools such as a source code editor; project tree browsers; and interfaces to compilers, assemblers, and linkers are usually included.</div></li><li class="level1"><div class="li"> <strong>IP Address</strong> - Internet Protocol Address. A unique 32-bit identifier assigned to a machine connected to a TCP/IP network.</div></li><li class="level1"><div class="li"> <strong>IRQ</strong> - Interrupt Request. A signal sent from a peripheral device to the processor which request that some action, such as processing data from the peripheral, be taken.</div></li><li class="level1"><div class="li"> <strong>JRE</strong> - Java Runtime Environment. The minimum set of files and utilities that are required to run Java programs.</div></li><li class="level1"><div class="li"> <strong>JTAG</strong> - Joint Test Action Group. A protocol outlining standards in low level hardware access, typically used for debugging.</div></li><li class="level1"><div class="li"> <strong>Kernel</strong> - The core of an operating system which provides fundamental services such as hardware management and resource allocation.</div></li><li class="level1"><div class="li"> <strong>L1 Memory</strong> - Level 1 memory. Memory that is directly accessed by the Blackfin core with no intervening memory subsystems.</div></li><li class="level1"><div class="li"> <strong>L2 Memory</strong> - Level 2 memory. Memory that is at least one level removed from the Blackfin core. L2 memory has a larger capacity than L1 memory, but it requires additional latency to access.</div></li><li class="level1"><div class="li"> <strong>LAN</strong> - Local Area Network.</div></li><li class="level1"><div class="li"> <strong>LD</strong> - The GNU Linker.</div></li><li class="level1"><div class="li"> <strong>Linux</strong> - A kernel originally developed by Linus Torvalds which is often combined with various free software and utilities from the GNU project to create a non-proprietary UNIX-like environment.</div></li><li class="level1"><div class="li"> <strong>MAC -</strong> Multiply / Accumulate. A mathematical operation that multiplies two numbers and then adds a third to get the result.</div></li><li class="level1"><div class="li"> <strong>MAC Address -</strong> Media Access Control Address. This is a globally unique 48-bit physical identifier assigned by the manufacturer to an Ethernet device, it is registered with the IEEE. The MAC address is typically transmitted through the Ethernet frame, it is used by a network to identify know machines.</div></li><li class="level1"><div class="li"> <strong>MMR</strong> - Memory Mapped Register. A specific location in the Blackfin processor’s main memory which is used by the processor as if it were a register.</div></li><li class="level1"><div class="li"> <strong>MMU</strong> - Memory Management Unit. A component of the processor that supports protection and selective caching of memory.</div></li><li class="level1"><div class="li"> <strong>Netmask</strong> - A set of flags which determine which part of an IP address refers to the network and which part refers to the host range.</div></li><li class="level1"><div class="li"> <strong>Orthogonal</strong> - The characteristic of being independent. An orthogonal instruction set allows any register to be used in an instruction that references a register.</div></li><li class="level1"><div class="li"> <strong>PC</strong> - Program counter. A register that contains the address of the next instruction to be executed.</div></li><li class="level1"><div class="li"> <strong>PF</strong> - Programmable Flag. General purpose input/output pin on the Blackfin processor.</div></li><li class="level1"><div class="li"> <strong>PIC</strong> - Position Independent Code. Code that uses only relative address and consequently can be run from any memory location.</div></li><li class="level1"><div class="li"> <strong>PPI</strong> - Parallel Peripheral Interconnect. A peripheral on the Blackfin processor used to connect to parallel devices such as A/D and D/A converters.</div></li><li class="level1"><div class="li"> <strong>ROM</strong> - Read Only Memory. A data storage device manufactured with fixed contents.</div></li><li class="level1"><div class="li"> <strong>RTC</strong> - Real Time Clock. A Blackfin component that generates timing pules for the digital watch features of the Blackfin processor.</div></li><li class="level1"><div class="li"> <strong>S/P-DIF</strong> - Sony/Phillips Digital Interface. A protocol for sending and receiving digital audio.</div></li><li class="level1"><div class="li"> <strong>SDRAM</strong> - Synchronous Dynamic Random Access Memory. A form of DRAM that includes a clock signal with its other control signals. This clock signal allows SDRAM devices to support burst access modes that clock out a series of successive bits.</div></li><li class="level1"><div class="li"> <strong>SMP</strong> - Symmetric Multiprocessing. A system architecture in which two or more processors, each being able to run any task including kernel tasks, share the processing load.</div></li><li class="level1"><div class="li"> <strong>SPI</strong> - Serial Peripheral Interface. A synchronous serial protocol used to connect integrated circuits.</div></li><li class="level1"><div class="li"> <strong>SPORT</strong> - Serial Port. A high speed synchronous input/output device on the Blackfin processor.</div></li><li class="level1"><div class="li"> <strong>SRAM</strong> - Static Random Access Memory. Fast read/write memory that does not require periodic refreshing.</div></li><li class="level1"><div class="li"> <strong>Subnet</strong> - The network portion of an IP address.</div></li><li class="level1"><div class="li"> <strong>TCP / IP</strong> - Transmission Control Protocol / Internet Protocol. These protocols form the bases of all Internet communications.</div></li><li class="level1"><div class="li"> <strong>TFTP</strong> - Trivial File Transfer Protocol. This protocol implements very basic network file transfer functionality. It is often used to load a boot image.</div></li><li class="level1"><div class="li"> <strong>UART</strong> - Universal Asynchronous Receiver Transmitter. A module that contains both the receiving and transmitting circuits required for asynchronous serial communication.</div></li><li class="level1"><div class="li"> <strong>uClibc</strong> - This is the uClinux embedded C library.</div></li><li class="level1"><div class="li"> <strong>UNIX</strong> - A multi-user, portable operating system originally developed by Bell Labs.</div></li></ul></div></body></html>⌨️ 快捷键说明
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