📄 io.h
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#ifndef _M68K_IO_H#define _M68K_IO_H#ifdef __KERNEL__#include <linux/config.h>#ifdef CONFIG_ATARI#include <asm/atarihw.h>#define SLOW_DOWN_IO do { if (MACH_IS_ATARI) MFPDELAY(); } while (0)#endif#include <asm/virtconvert.h>/* * These are for PCI shared memory _only_ and should never be used * on any other type of memory, including Zorro memory. They are meant to * access the bus in the bus byte order which is little-endian!. * * readX/writeX() are used to access memory mapped devices. On some * architectures the memory mapped IO stuff needs to be accessed * differently. On the m68k architecture, we just read/write the * memory location directly. *//* ++roman: The assignments to temp. vars avoid that gcc sometimes generates * two accesses to memory, which may be undesireable for some devices. */#define readb(addr) \ ({ unsigned char __v = (*(volatile unsigned char *) (addr)); __v; })#define readw(addr) \ ({ unsigned short __v = (*(volatile unsigned short *) (addr)); __v; })#define readl(addr) \ ({ unsigned int __v = (*(volatile unsigned int *) (addr)); __v; })#define writeb(b,addr) (void)((*(volatile unsigned char *) (addr)) = (b))#define writew(b,addr) (void)((*(volatile unsigned short *) (addr)) = (b))#define writel(b,addr) (void)((*(volatile unsigned int *) (addr)) = (b))#define memset_io(a,b,c) memset((void *)(a),(b),(c))#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))#define inb_p(addr) readb(addr)#define inb(addr) readb(addr)#define outb(x,addr) ((void) writeb(x,addr))#define outb_p(x,addr) outb(x,addr)#ifndef CONFIG_SUN3#define IO_SPACE_LIMIT 0xffff#else#define IO_SPACE_LIMIT 0x0fffffff#endif/* Values for nocacheflag and cmode */#define IOMAP_FULL_CACHING 0#define IOMAP_NOCACHE_SER 1#define IOMAP_NOCACHE_NONSER 2#define IOMAP_WRITETHROUGH 3extern void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag);extern void __iounmap(void *addr, unsigned long size);extern inline void *ioremap(unsigned long physaddr, unsigned long size){ return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);}extern inline void *ioremap_nocache(unsigned long physaddr, unsigned long size){ return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);}extern inline void *ioremap_writethrough(unsigned long physaddr, unsigned long size){ return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);}extern inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size){ return __ioremap(physaddr, size, IOMAP_FULL_CACHING);}extern void iounmap(void *addr);/* Nothing to do */#define dma_cache_inv(_start,_size) do { } while (0)#define dma_cache_wback(_start,_size) do { } while (0)#define dma_cache_wback_inv(_start,_size) do { } while (0)#endif /* __KERNEL__ */#endif /* _M68K_IO_H */
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