i2o.h

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/*
 * I2O kernel space accessible structures/APIs
 * 
 * (c) Copyright 1999, 2000 Red Hat Software
 *
 * This program is free software; you can redistribute it and/or 
 * modify it under the terms of the GNU General Public License 
 * as published by the Free Software Foundation; either version 
 * 2 of the License, or (at your option) any later version.  
 * 
 *************************************************************************
 *
 * This header file defined the I2O APIs/structures for use by 
 * the I2O kernel modules.
 *
 */

#ifndef _I2O_H
#define _I2O_H
#ifdef __KERNEL__	/* This file to be included by kernel only */

#include <linux/i2o-dev.h>

/* How many different OSM's are we allowing */ 
#define MAX_I2O_MODULES		64

/* How many OSMs can register themselves for device status updates? */
#define I2O_MAX_MANAGERS	4

#include <asm/semaphore.h> /* Needed for MUTEX init macros */
#include <linux/config.h>
#include <linux/notifier.h>
#include <asm/atomic.h>

/*
 * message structures
 */
struct i2o_message
{
	u8	version_offset;
	u8	flags;
	u16	size;
	u32	target_tid:12;
	u32	init_tid:12;
	u32	function:8;	
	u32	initiator_context;
	/* List follows */
};

/*
 *	Each I2O device entity has one or more of these. There is one
 *	per device.
 */
struct i2o_device
{
	i2o_lct_entry lct_data; /* Device LCT information */
	u32 flags;		
	int i2oversion;		/* I2O version supported. Actually there
				 * should be high and low version */

	struct proc_dir_entry* proc_entry;	/* /proc dir */

	/* Primary user */
	struct i2o_handler *owner;

	/* Management users */
	struct i2o_handler *managers[I2O_MAX_MANAGERS];		
	int num_managers;

	struct i2o_controller *controller;	/* Controlling IOP */
	struct i2o_device *next;	/* Chain */
	char dev_name[8];		/* linux /dev name if available */
};

/*
 *	Resource data for each PCI I2O controller
 */	 	
struct i2o_pci
{
	int irq;
#ifdef CONFIG_MTRR
	int mtrr_reg0;
	int mtrr_reg1;
#endif
};

/*
 * Transport types supported by I2O stack
 */
#define I2O_TYPE_PCI		0x01		/* PCI I2O controller */	


/*
 * Each I2O controller has one of these objects
 */
struct i2o_controller
{
	char name[16];
	int unit;
	int type;
	int enabled;

	struct notifier_block *event_notifer;	/* Events */
	atomic_t users;
	struct i2o_device *devices;		/* I2O device chain */
	struct i2o_controller *next;		/* Controller chain */
	volatile u32 *post_port;		/* Inbout port */
	volatile u32 *reply_port;		/* Outbound port */
	volatile u32 *irq_mask;			/* Interrupt register */

	/* Dynamic LCT related data */
	struct semaphore lct_sem;
	int lct_pid;
	int lct_running;

	i2o_status_block *status_block;		/* IOP status block */
	i2o_lct *lct;				/* Logical Config Table */
	i2o_lct *dlct;				/* Temp LCT */
	i2o_hrt *hrt;				/* HW Resource Table */

	u32 mem_offset;				/* MFA offset */
	u32 mem_phys;				/* MFA physical */

	struct proc_dir_entry* proc_entry;	/* /proc dir */

	union
	{					/* Bus information */
		struct i2o_pci pci;
	} bus;

	/* Bus specific destructor */
	void (*destructor)(struct i2o_controller *);		

	/* Bus specific attach/detach */
	int (*bind)(struct i2o_controller *, struct i2o_device *);	

	/* Bus specific initiator */
	int (*unbind)(struct i2o_controller *, struct i2o_device *);

	/* Bus specific enable/disable */
	void (*bus_enable)(struct i2o_controller *c);
	void (*bus_disable)(struct i2o_controller *c);

	void *page_frame;		/* Message buffers */
};

/*
 * OSM resgistration block
 *
 * Each OSM creates at least one of these and registers it with the
 * I2O core through i2o_register_handler.  An OSM may want to
 * register more than one if it wants a fast path to a reply
 * handler by having a separate initiator context for each 
 * class function.
 */
struct i2o_handler
{
	/* Message reply handler */
	void (*reply)(struct i2o_handler *, struct i2o_controller *, struct i2o_message *);

	/* New device notification handler */
	void (*new_dev_notify)(struct i2o_controller *, struct i2o_device *);

	/* Device deltion handler */
	void (*dev_del_notify)(struct i2o_controller *, struct i2o_device *);

	/* Reboot notification handler */
	void (*reboot_notify)(void);

	char *name;		/* OSM name */
	int context;	/* Low 8 bits of the transaction info */
	u32 class;		/* I2O classes that this driver handles */
	/* User data follows */
};

#ifdef MODULE
/*
 * Used by bus specific modules to communicate with the core
 *
 * This is needed because the bus modules cannot make direct
 * calls to the core as this results in the i2o_bus_specific_module
 * being dependent on the core, not the otherway around.
 * In that case, a 'modprobe i2o_lan' loads i2o_core & i2o_lan,
 * but _not_ i2o_pci...which makes the whole thing pretty useless :)
 *
 */
struct i2o_core_func_table
{
	int	(*install)(struct i2o_controller *);
	int	(*activate)(struct i2o_controller *);
	struct  i2o_controller*	(*find)(int);
	void	(*unlock)(struct i2o_controller *);
	void	(*run_queue)(struct i2o_controller *c);
	int	(*delete)(struct i2o_controller *);
};
#endif // MODULE

/*
 * I2O System table entry
 *
 * The system table contains information about all the IOPs in the
 * system.  It is sent to all IOPs so that they can create peer2peer
 * connections between them.
 */
struct i2o_sys_tbl_entry
{
	u16	org_id;
	u16	reserved1;
	u32	iop_id:12;
	u32	reserved2:20;
	u16	seg_num:12;
	u16 	i2o_version:4;
	u8 	iop_state;
	u8 	msg_type;
	u16	frame_size;
	u16	reserved3;
	u32	last_changed;
	u32	iop_capabilities;
	u32	inbound_low;
	u32	inbound_high;
};

struct i2o_sys_tbl
{
	u8 	num_entries;
	u8 	version;
	u16 	reserved1;
	u32	change_ind;
	u32	reserved2;
	u32	reserved3;
	struct i2o_sys_tbl_entry iops[0];
};	

/*
 *	Messenger inlines
 */
extern inline u32 I2O_POST_READ32(struct i2o_controller *c)
{
	return *c->post_port;
}

extern inline void I2O_POST_WRITE32(struct i2o_controller *c, u32 Val)
{
	*c->post_port = Val;
}


extern inline u32 I2O_REPLY_READ32(struct i2o_controller *c)
{
	return *c->reply_port;
}

extern inline void I2O_REPLY_WRITE32(struct i2o_controller *c, u32 Val)
{
	*c->reply_port= Val;
}
 

extern inline u32 I2O_IRQ_READ32(struct i2o_controller *c)
{
	return *c->irq_mask;
}

extern inline void I2O_IRQ_WRITE32(struct i2o_controller *c, u32 Val)
{
	*c->irq_mask = Val;
}


extern inline void i2o_post_message(struct i2o_controller *c, u32 m)
{
	/* The second line isnt spurious - thats forcing PCI posting */
	I2O_POST_WRITE32(c,m);
	(void) I2O_IRQ_READ32(c);
}

extern inline void i2o_flush_reply(struct i2o_controller *c, u32 m)
{
	I2O_REPLY_WRITE32(c,m);
}

extern struct i2o_controller *i2o_find_controller(int);
extern void i2o_unlock_controller(struct i2o_controller *);
extern struct i2o_controller *i2o_controller_chain;
extern int i2o_num_controllers;
extern int i2o_status_get(struct i2o_controller *);