clgenfb.c

Linux内核源代码 为压缩文件 是<<Linux内核>>一书中的源代码

	case 4:		/* sceen is powered down */
		vga_wgfx (fb_info->regs, CL_GRE, 0x00);
		break;
	default:
		DPRINTK ("EXIT, returning 1\n");
		return 1;
	}

	/* set new */
	switch (blank_mode) {
	case 0:		/* Unblank screen */
		break;
	case 1:		/* Blank screen */
		val = vga_rseq (fb_info->regs, VGA_SEQ_CLOCK_MODE);
		vga_wseq (fb_info->regs, VGA_SEQ_CLOCK_MODE, val | 0x20);	/* set "FullBandwidth" bit */
		break;
	case 2:		/* suspend vsync */
		vga_wgfx (fb_info->regs, CL_GRE, 0x04);
		break;
	case 3:		/* suspend hsync */
		vga_wgfx (fb_info->regs, CL_GRE, 0x02);
		break;
	case 4:		/* powerdown */
		vga_wgfx (fb_info->regs, CL_GRE, 0x06);
		break;
	default:
		DPRINTK ("EXIT, returning 1\n");
		return 1;
	}

	current_mode = blank_mode;
	DPRINTK ("EXIT, returning 0\n");
	return 0;
}
/**** END   Hardware specific Routines **************************************/
/****************************************************************************/
/**** BEGIN Internal Routines ***********************************************/

static void __init init_vgachip (struct clgenfb_info *fb_info)
{
	const struct clgen_board_info_rec *bi;
	
	DPRINTK ("ENTER\n");

	assert (fb_info != NULL);
	
	bi = &clgen_board_info[fb_info->btype];

	/* reset board globally */
	switch (fb_info->btype) {
	case BT_PICCOLO:
		WSFR (fb_info, 0x01);
		udelay (500);
		WSFR (fb_info, 0x51);
		udelay (500);
		break;
	case BT_PICASSO:
		WSFR2 (fb_info, 0xff);
		udelay (500);
		break;
	case BT_SD64:
	case BT_SPECTRUM:
		WSFR (fb_info, 0x1f);
		udelay (500);
		WSFR (fb_info, 0x4f);
		udelay (500);
		break;
	case BT_PICASSO4:
		vga_wcrt (fb_info->regs, CL_CRT51, 0x00);	/* disable flickerfixer */
		mdelay (100);
		vga_wgfx (fb_info->regs, CL_GR2F, 0x00);	/* from Klaus' NetBSD driver: */
		vga_wgfx (fb_info->regs, CL_GR33, 0x00);	/* put blitter into 542x compat */
		vga_wgfx (fb_info->regs, CL_GR31, 0x00);	/* mode */
		break;

	case BT_GD5480:
		vga_wgfx (fb_info->regs, CL_GR2F, 0x00);	/* from Klaus' NetBSD driver: */
		break;

	case BT_ALPINE:
		/* Nothing to do to reset the board. */
		break;

	default:
		printk (KERN_ERR "clgen: Warning: Unknown board type\n");
		break;
	}

#ifdef CLGEN_USE_HARDCODED_RAM_SETTINGS
	/* "pre-set" a RAMsize; if the test succeeds, double it */
	if (fb_info->btype == BT_SD64 ||
	    fb_info->btype == BT_PICASSO4)
		fb_info->size = 0x400000;
	else
		fb_info->size = 0x200000;
#else
	assert (fb_info->size > 0); /* make sure RAM size set by this point */
#endif

	/* assume it's a "large memory" board (2/4 MB) */
	fb_info->smallboard = FALSE;

	/* the P4 is not fully initialized here; I rely on it having been */
	/* inited under AmigaOS already, which seems to work just fine    */
	/* (Klaus advised to do it this way)                              */

	if (fb_info->btype != BT_PICASSO4) {
		WGen (fb_info, CL_VSSM, 0x10);	/* EGS: 0x16 */
		WGen (fb_info, CL_POS102, 0x01);
		WGen (fb_info, CL_VSSM, 0x08);	/* EGS: 0x0e */

		if (fb_info->btype != BT_SD64)
			WGen (fb_info, CL_VSSM2, 0x01);

		vga_wseq (fb_info->regs, CL_SEQR0, 0x03);	/* reset sequencer logic */

		vga_wseq (fb_info->regs, VGA_SEQ_CLOCK_MODE, 0x21);	/* FullBandwidth (video off) and 8/9 dot clock */
		WGen (fb_info, VGA_MIS_W, 0xc1);	/* polarity (-/-), disable access to display memory, VGA_CRTC_START_HI base address: color */

/*      vga_wgfx (fb_info->regs, CL_GRA, 0xce);    "magic cookie" - doesn't make any sense to me.. */
		vga_wseq (fb_info->regs, CL_SEQR6, 0x12);	/* unlock all extension registers */

		vga_wgfx (fb_info->regs, CL_GR31, 0x04);	/* reset blitter */

		switch (fb_info->btype) {
		case BT_GD5480:
			vga_wseq (fb_info->regs, CL_SEQRF, 0x98);
			break;
		case BT_ALPINE:
			break;
		case BT_SD64:
			vga_wseq (fb_info->regs, CL_SEQRF, 0xb8);
			break;
		default:
			vga_wseq (fb_info->regs, CL_SEQR16, 0x0f);
			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);
			break;
		}
	}
	vga_wseq (fb_info->regs, VGA_SEQ_PLANE_WRITE, 0xff);	/* plane mask: nothing */
	vga_wseq (fb_info->regs, VGA_SEQ_CHARACTER_MAP, 0x00);	/* character map select: doesn't even matter in gx mode */
	vga_wseq (fb_info->regs, VGA_SEQ_MEMORY_MODE, 0x0e);	/* memory mode: chain-4, no odd/even, ext. memory */

	/* controller-internal base address of video memory */
	if (bi->init_sr07)
		vga_wseq (fb_info->regs, CL_SEQR7, bi->sr07);

	/*  vga_wseq (fb_info->regs, CL_SEQR8, 0x00); *//* EEPROM control: shouldn't be necessary to write to this at all.. */

	vga_wseq (fb_info->regs, CL_SEQR10, 0x00);		/* graphics cursor X position (incomplete; position gives rem. 3 bits */
	vga_wseq (fb_info->regs, CL_SEQR11, 0x00);		/* graphics cursor Y position (..."... ) */
	vga_wseq (fb_info->regs, CL_SEQR12, 0x00);		/* graphics cursor attributes */
	vga_wseq (fb_info->regs, CL_SEQR13, 0x00);		/* graphics cursor pattern address */

	/* writing these on a P4 might give problems..  */
	if (fb_info->btype != BT_PICASSO4) {
		vga_wseq (fb_info->regs, CL_SEQR17, 0x00);		/* configuration readback and ext. color */
		vga_wseq (fb_info->regs, CL_SEQR18, 0x02);		/* signature generator */
	}

	/* MCLK select etc. */
	if (bi->init_sr1f)
		vga_wseq (fb_info->regs, CL_SEQR1F, bi->sr1f);

	vga_wcrt (fb_info->regs, VGA_CRTC_PRESET_ROW, 0x00);	/* Screen A preset row scan: none */
	vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_START, 0x20);	/* Text cursor start: disable text cursor */
	vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_END, 0x00);	/* Text cursor end: - */
	vga_wcrt (fb_info->regs, VGA_CRTC_START_HI, 0x00);	/* Screen start address high: 0 */
	vga_wcrt (fb_info->regs, VGA_CRTC_START_LO, 0x00);	/* Screen start address low: 0 */
	vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_HI, 0x00);	/* text cursor location high: 0 */
	vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_LO, 0x00);	/* text cursor location low: 0 */

	vga_wcrt (fb_info->regs, VGA_CRTC_UNDERLINE, 0x00);	/* Underline Row scanline: - */
	vga_wcrt (fb_info->regs, VGA_CRTC_MODE, 0xc3);	/* mode control: timing enable, byte mode, no compat modes */
	vga_wcrt (fb_info->regs, VGA_CRTC_LINE_COMPARE, 0x00);	/* Line Compare: not needed */
	/* ### add 0x40 for text modes with > 30 MHz pixclock */
	vga_wcrt (fb_info->regs, CL_CRT1B, 0x02);	/* ext. display controls: ext.adr. wrap */

	vga_wgfx (fb_info->regs, VGA_GFX_SR_VALUE, 0x00);	/* Set/Reset registes: - */
	vga_wgfx (fb_info->regs, VGA_GFX_SR_ENABLE, 0x00);	/* Set/Reset enable: - */
	vga_wgfx (fb_info->regs, VGA_GFX_COMPARE_VALUE, 0x00);	/* Color Compare: - */
	vga_wgfx (fb_info->regs, VGA_GFX_DATA_ROTATE, 0x00);	/* Data Rotate: - */
	vga_wgfx (fb_info->regs, VGA_GFX_PLANE_READ, 0x00);	/* Read Map Select: - */
	vga_wgfx (fb_info->regs, VGA_GFX_MODE, 0x00);	/* Mode: conf. for 16/4/2 color mode, no odd/even, read/write mode 0 */
	vga_wgfx (fb_info->regs, VGA_GFX_MISC, 0x01);	/* Miscellaneous: memory map base address, graphics mode */
	vga_wgfx (fb_info->regs, VGA_GFX_COMPARE_MASK, 0x0f);	/* Color Don't care: involve all planes */
	vga_wgfx (fb_info->regs, VGA_GFX_BIT_MASK, 0xff);	/* Bit Mask: no mask at all */
	if (fb_info->btype == BT_ALPINE)
		vga_wgfx (fb_info->regs, CL_GRB, 0x20);	/* (5434 can't have bit 3 set for bitblt) */
	else
		vga_wgfx (fb_info->regs, CL_GRB, 0x28);	/* Graphics controller mode extensions: finer granularity, 8byte data latches */

	vga_wgfx (fb_info->regs, CL_GRC, 0xff);	/* Color Key compare: - */
	vga_wgfx (fb_info->regs, CL_GRD, 0x00);	/* Color Key compare mask: - */
	vga_wgfx (fb_info->regs, CL_GRE, 0x00);	/* Miscellaneous control: - */
	/*  vga_wgfx (fb_info->regs, CL_GR10, 0x00); *//* Background color byte 1: - */
/*  vga_wgfx (fb_info->regs, CL_GR11, 0x00); */

	vga_wattr (fb_info->regs, VGA_ATC_PALETTE0, 0x00);	/* Attribute Controller palette registers: "identity mapping" */
	vga_wattr (fb_info->regs, VGA_ATC_PALETTE1, 0x01);
	vga_wattr (fb_info->regs, VGA_ATC_PALETTE2, 0x02);
	vga_wattr (fb_info->regs, VGA_ATC_PALETTE3, 0x03);
	vga_wattr (fb_info->regs, VGA_ATC_PALETTE4, 0x04);
	vga_wattr (fb_info->regs, VGA_ATC_PALETTE5, 0x05);
	vga_wattr (fb_info->regs, VGA_ATC_PALETTE6, 0x06);
	vga_wattr (fb_info->regs, VGA_ATC_PALETTE7, 0x07);
	vga_wattr (fb_info->regs, VGA_ATC_PALETTE8, 0x08);
	vga_wattr (fb_info->regs, VGA_ATC_PALETTE9, 0x09);
	vga_wattr (fb_info->regs, VGA_ATC_PALETTEA, 0x0a);
	vga_wattr (fb_info->regs, VGA_ATC_PALETTEB, 0x0b);
	vga_wattr (fb_info->regs, VGA_ATC_PALETTEC, 0x0c);
	vga_wattr (fb_info->regs, VGA_ATC_PALETTED, 0x0d);
	vga_wattr (fb_info->regs, VGA_ATC_PALETTEE, 0x0e);
	vga_wattr (fb_info->regs, VGA_ATC_PALETTEF, 0x0f);

	vga_wattr (fb_info->regs, VGA_ATC_MODE, 0x01);	/* Attribute Controller mode: graphics mode */
	vga_wattr (fb_info->regs, VGA_ATC_OVERSCAN, 0x00);	/* Overscan color reg.: reg. 0 */
	vga_wattr (fb_info->regs, VGA_ATC_PLANE_ENABLE, 0x0f);	/* Color Plane enable: Enable all 4 planes */
/* ###  vga_wattr (fb_info->regs, CL_AR33, 0x00); * Pixel Panning: - */
	vga_wattr (fb_info->regs, VGA_ATC_COLOR_PAGE, 0x00);	/* Color Select: - */

	WGen (fb_info, VGA_PEL_MSK, 0xff);	/* Pixel mask: no mask */

	if (fb_info->btype != BT_ALPINE && fb_info->btype != BT_GD5480)
		WGen (fb_info, VGA_MIS_W, 0xc3);	/* polarity (-/-), enable display mem, VGA_CRTC_START_HI i/o base = color */

	vga_wgfx (fb_info->regs, CL_GR31, 0x04);	/* BLT Start/status: Blitter reset */
	vga_wgfx (fb_info->regs, CL_GR31, 0x00);	/* - " -           : "end-of-reset" */

	/* CLUT setup */
	WClut (fb_info, 0, 0x00, 0x00, 0x00);	/* background: black */
	WClut (fb_info, 1, 0x3f, 0x3f, 0x3f);	/* foreground: white */
	WClut (fb_info, 2, 0x00, 0x20, 0x00);
	WClut (fb_info, 3, 0x00, 0x20, 0x20);
	WClut (fb_info, 4, 0x20, 0x00, 0x00);
	WClut (fb_info, 5, 0x20, 0x00, 0x20);
	WClut (fb_info, 6, 0x20, 0x10, 0x00);
	WClut (fb_info, 7, 0x20, 0x20, 0x20);
	WClut (fb_info, 8, 0x10, 0x10, 0x10);
	WClut (fb_info, 9, 0x10, 0x10, 0x30);
	WClut (fb_info, 10, 0x10, 0x30, 0x10);
	WClut (fb_info, 11, 0x10, 0x30, 0x30);
	WClut (fb_info, 12, 0x30, 0x10, 0x10);
	WClut (fb_info, 13, 0x30, 0x10, 0x30);
	WClut (fb_info, 14, 0x30, 0x30, 0x10);
	WClut (fb_info, 15, 0x30, 0x30, 0x30);

	/* the rest a grey ramp */
	{
		int i;

		for (i = 16; i < 256; i++)
			WClut (fb_info, i, i >> 2, i >> 2, i >> 2);
	}


	/* misc... */
	WHDR (fb_info, 0);	/* Hidden DAC register: - */

	printk (KERN_INFO "clgen: This board has %ld bytes of DRAM memory\n", fb_info->size);
	DPRINTK ("EXIT\n");
	return;
}

static void switch_monitor (struct clgenfb_info *fb_info, int on)
{
#ifdef CONFIG_ZORRO /* only works on Zorro boards */
	static int IsOn = 0;	/* XXX not ok for multiple boards */

	DPRINTK ("ENTER\n");

	if (fb_info->btype == BT_PICASSO4)
		return;		/* nothing to switch */
	if (fb_info->btype == BT_ALPINE)
		return;		/* nothing to switch */
	if (fb_info->btype == BT_GD5480)
		return;		/* nothing to switch */
	if (fb_info->btype == BT_PICASSO) {
		if ((on && !IsOn) || (!on && IsOn))
			WSFR (fb_info, 0xff);

		DPRINTK ("EXIT\n");
		return;
	}
	if (on) {
		switch (fb_info->btype) {
		case BT_SD64:
			WSFR (fb_info, fb_info->SFR | 0x21);
			break;
		case BT_PICCOLO:
			WSFR (fb_info, fb_info->SFR | 0x28);
			break;
		case BT_SPECTRUM:
			WSFR (fb_info, 0x6f);
			break;
		default: /* do nothing */ break;
		}
	} else {
		switch (fb_info->btype) {
		case BT_SD64:
			WSFR (fb_info, fb_info->SFR & 0xde);
			break;
		case BT_PICCOLO:
			WSFR (fb_info, fb_info->SFR & 0xd7);
			break;
		case BT_SPECTRUM:
			WSFR (fb_info, 0x4f);
			break;
		default: /* do nothing */ break;
		}
	}
	
	DPRINTK ("EXIT\n");
#endif /* CONFIG_ZORRO */
}

static void clgen_set_disp (const void *par, struct display *disp,
			    struct fb_info_gen *info)
{
	struct clgenfb_par *_par = (struct clgenfb_par *) par;
	struct clgenfb_info *fb_info = (struct clgenfb_info *) info;
	int accel_text;

	DPRINTK ("ENTER\n");
	
	assert (_par != NULL);
	assert (fb_info != NULL);
	
	accel_text = _par->var.accel_flags & FB_ACCELF_TEXT;

	printk ("Cirrus Logic video mode: ");
	disp->screen_base = (char *) fb_info->fbmem;
	switch (_par->var.bits_per_pixel) {
#ifdef FBCON_HAS_MFB
	case 1:
		printk ("monochrome\n");
		if (fb_info->btype == BT_GD5480)
			disp->screen_base = (char *) fb_info->fbmem;
		disp->dispsw = &fbcon_mfb;
		break;
#endif
#ifdef FBCON_HAS_CFB8
	case 8:
		printk ("8 bit color depth\n");
		if (fb_info->btype == BT_GD5480)
			disp->screen_base = (char *) fb_info->fbmem;
		if (accel_text)
			disp->dispsw = &fbcon_clgen_8;
		else
			disp->dispsw = &fbcon_cfb8;
		break;
#endif
#ifdef FBCON_HAS_CFB16
	case 16:
		printk ("16 bit color depth\n");
		if (accel_text)
			disp->dispsw = &fbcon_clgen_16;
		else
			disp->dispsw = &fbcon_cfb16;
		if (fb_info->btype == BT_GD5480)
			disp->screen_base = (char *) fb_info->fbmem + 1 * MB_;
		disp->dispsw_data = fb_info->fbcon_cmap.cfb16;
		break;
#endif
#ifdef FBCON_HAS_CFB24
	case 24:
		printk ("24 bit color depth\n");
		disp->dispsw = &fbcon_cfb24;
		if (fb_info->btype == BT_GD5480)
			disp->screen_base = (char *) fb_info->fbmem + 2 * MB_;
		disp->dispsw_data = fb_info->fbcon_cmap.cfb24;
		break;
#endif
#ifdef FBCON_HAS_CFB32
	case 32:
		printk ("32 bit color depth\n");
		if (accel_text)
			disp->dispsw = &fbcon_clgen_32;
		else
			disp->dispsw = &fbcon_cfb32;
		if (fb_info->btype == BT_GD5480)
			disp->screen_base = (char *) fb_info->fbmem + 2 * MB_;
		disp->dispsw_data = fb_info->fbcon_cmap.cfb32;
		break;
#endif

	default:
		printk ("unsupported color depth\n");
		disp->dispsw = &fbcon_dummy;
		disp->dispsw_data = NULL;
		break;
	}

	DPRINTK ("EXIT\n");
}

#ifdef FBCON_HAS_CFB8
static void fbcon_clgen8_bmove (struct display *p, int sy, int sx,
				int dy, int dx, int height, int width)
{
	struct clgenfb_info *fb_info = (struct clgenfb_info *) p->fb_info;

	DPRINTK ("ENTER\n");

	sx *= fontwidth (p);
	sy *= fontheight (p);
	dx *= fontwidth (p);
	dy *= fontheight (p);
	width *= fontwidth (p);
	height *= fontheight (p);

	clgen_BitBLT (fb_info->regs, (unsigned short) sx, (unsigned short) sy,
		      (unsigned short) dx, (unsigned short) dy,
		      (unsigned short) width, (unsigned short) height,
		      fb_info->currentmode.line_length);

	DPRINTK ("EXIT\n");
}

static void fbcon_clgen8_clear (struct vc_data *conp, struct display *p,
				int sy, int sx, int height, int width)
{
	struct clgenfb_info *fb_info = (struct clgenfb_info *) p->fb_info;
	unsigned short col;

	DPRINTK ("ENTER\n");

	sx *= fontwidth (p);
	sy *= fontheight (p);
	width *= fontwidth (p);
	height *= fontheight (p);

	col = attr_bgcol_ec (p, conp);
	col &= 0xff;

	clgen_RectFill (fb_info, (unsigned short) sx, (unsigned short) sy,
			(unsigned short) width, (unsigned short) height,
			col, fb_info->currentmode.line_length);

	DPRINTK ("EXIT\n");
}

#endif

#ifdef FBCON_HAS_CFB16
static void fbcon_clgen16_bmove (struct display *p, int sy, int sx,
				 int dy, int dx, int height, int width)
{
	struct clgenfb_info *fb_info = (struct clgenfb_info *) p->fb_info;

	DPRINTK ("ENTER\n");

	sx *= fontwidth (p) * 2;	/* 2 bytes/pixel */
	sy *= fontheight (p);
	dx