📄 hamachi.c
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/* hamachi.c: A Packet Engines GNIC-II Gigabit Ethernet driver for Linux. *//* Written 1998-2000 by Donald Becker. Updates 2000 by Keith Underwood. This software may be used and distributed according to the terms of the GNU Public License (GPL), incorporated herein by reference. Drivers based on or derived from this code fall under the GPL and must retain the authorship, copyright and license notice. This file is not a complete program and may only be used when the entire operating system is licensed under the GPL. The author may be reached as becker@scyld.com, or C/O Scyld Computing Corporation 410 Severn Ave., Suite 210 Annapolis MD 21403 This driver is for the Packet Engines GNIC-II PCI Gigabit Ethernet adapter. Support and updates available at http://www.scyld.com/network/hamachi.html or http://www.parl.clemson.edu/~keithu/hamachi.html For best viewing, set your tabs to 3.*/static const char *version ="hamachi.c:v1.01 5/16/2000 Written by Donald Becker\n"" Some modifications by Eric kasten <kasten@nscl.msu.edu>\n"" Further modifications by Keith Underwood <keithu@parl.clemson.edu>\n"" Support by many others\n"" http://www.scyld.com/network/hamachi.html\n"" or\n"" http://www.parl.clemson.edu/~keithu/drivers/hamachi.html\n";/* A few user-configurable values. */static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */#define final_version#define hamachi_debug debug/* Maximum events (Rx packets, etc.) to handle at each interrupt. */static int max_interrupt_work = 40;static int mtu = 0;/* Default values selected by testing on a dual processor PIII-450 *//* These six interrupt control parameters may be set directly when loading the * module, or through the rx_params and tx_params variables */static int max_rx_latency = 0x11;static int max_rx_gap = 0x05;static int min_rx_pkt = 0x18;static int max_tx_latency = 0x00; static int max_tx_gap = 0x00;static int min_tx_pkt = 0x30;/* Set the copy breakpoint for the copy-only-tiny-frames scheme. -Setting to > 1518 causes all frames to be copied -Setting to 0 disables copies*/static int rx_copybreak = 0;/* An override for the hardware detection of bus width. Set to 1 to force 32 bit PCI bus detection. Set to 4 to force 64 bit. Add 2 to disable parity detection.*/static int force32 = 0;/* Used to pass the media type, etc. These exist for driver interoperability. No media types are currently defined. - The lower 4 bits are reserved for the media type. - The next three bits may be set to one of the following: 0x00000000 : Autodetect PCI bus 0x00000010 : Force 32 bit PCI bus 0x00000020 : Disable parity detection 0x00000040 : Force 64 bit PCI bus Default is autodetect - The next bit can be used to force half-duplex. This is a bad idea since no known implementations implement half-duplex, and, in general, half-duplex for gigabit ethernet is a bad idea. 0x00000080 : Force half-duplex Default is full-duplex. - In the original driver, the ninth bit could be used to force full-duplex. Maintain that for compatibility 0x00000200 : Force full-duplex*/#define MAX_UNITS 8 /* More are supported, limit only on options */static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};/* The Hamachi chipset supports 3 parameters each for Rx and Tx * interruput management. Parameters will be loaded as specified into * the TxIntControl and RxIntControl registers. * * The registers are arranged as follows: * 23 - 16 15 - 8 7 - 0 * _________________________________ * | min_pkt | max_gap | max_latency | * --------------------------------- * min_pkt : The minimum number of packets processed between * interrupts. * max_gap : The maximum inter-packet gap in units of 8.192 us * max_latency : The absolute time between interrupts in units of 8.192 us * */static int rx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};static int tx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};/* Operational parameters that are set at compile time. *//* Keep the ring sizes a power of two for compile efficiency. The compiler will convert <unsigned>'%'<2^N> into a bit mask. Making the Tx ring too large decreases the effectiveness of channel bonding and packet priority. There are no ill effects from too-large receive rings, except for excessive memory usage *//* Empirically it appears that the Tx ring needs to be a little bigger for these Gbit adapters or you get into an overrun condition really easily. Also, things appear to work a bit better in back-to-back configurations if the Rx ring is 8 times the size of the Tx ring*/#define TX_RING_SIZE 64#define RX_RING_SIZE 512/* * Enable mii_ioctl. Added interrupt coalescing parameter adjustment. * 2/19/99 Pete Wyckoff <wyckoff@ca.sandia.gov> */#define HAVE_PRIVATE_IOCTL/* play with 64-bit addrlen; seems to be a teensy bit slower --pw *//* #define ADDRLEN 64 *//* * RX_CHECKSUM turns on card-generated receive checksum generation for * TCP and UDP packets. Otherwise the upper layers do the calculation. * TX_CHECKSUM won't do anything too useful, even if it works. There's no * easy mechanism by which to tell the TCP/UDP stack that it need not * generate checksums for this device. But if somebody can find a way * to get that to work, most of the card work is in here already. * 3/10/1999 Pete Wyckoff <wyckoff@ca.sandia.gov> */#undef TX_CHECKSUM#define RX_CHECKSUM/* Operational parameters that usually are not changed. *//* Time in jiffies before concluding the transmitter is hung. */#define TX_TIMEOUT (5*HZ)#include <linux/module.h>#include <linux/kernel.h>#include <linux/sched.h>#include <linux/string.h>#include <linux/timer.h>#include <linux/time.h>#include <linux/ptrace.h>#include <linux/errno.h>#include <linux/ioport.h>#include <linux/malloc.h>#include <linux/interrupt.h>#include <linux/pci.h>#include <linux/init.h>#include <asm/processor.h> /* Processor type for cache alignment. */#include <asm/bitops.h>#include <asm/io.h>#include <asm/unaligned.h>#include <asm/cache.h>#include <linux/netdevice.h>#include <linux/etherdevice.h>#include <linux/skbuff.h>#include <linux/ip.h>#include <linux/delay.h>/* IP_MF appears to be only defined in <netinet/ip.h>, however, we need it for hardware checksumming support. FYI... some of the definitions in <netinet/ip.h> conflict/duplicate those in other linux headers causing many compiler warnings.*/#ifndef IP_MF #define IP_MF 0x2000 /* IP more frags from <netinet/ip.h> */ #endif/* Define IP_OFFSET to be IPOPT_OFFSET */#ifndef IP_OFFSET #ifdef IPOPT_OFFSET #define IP_OFFSET IPOPT_OFFSET #else #define IP_OFFSET 2 #endif#endif#define RUN_AT(x) (jiffies + (x))/* Condensed bus+endian portability operations. */#if ADDRLEN == 64#define virt_to_desc(addr) cpu_to_le64(virt_to_bus(addr))#else #define virt_to_desc(addr) cpu_to_le32(virt_to_bus(addr))#define le32desc_to_virt(addr) bus_to_virt(le32_to_cpu(addr))#endif /* Theory of OperationI. Board CompatibilityThis device driver is designed for the Packet Engines "Hamachi"Gigabit Ethernet chip. The only PCA currently supported is the GNIC-II 64-bit66Mhz PCI card.II. Board-specific settingsNo jumpers exist on the board. The chip supports software correction ofvarious motherboard wiring errors, however this driver does not supportthat feature.III. Driver operationIIIa. Ring buffersThe Hamachi uses a typical descriptor based bus-master architecture.The descriptor list is similar to that used by the Digital Tulip.This driver uses two statically allocated fixed-size descriptor listsformed into rings by a branch from the final descriptor to the beginning ofthe list. The ring sizes are set at compile time by RX/TX_RING_SIZE.This driver uses a zero-copy receive and transmit scheme similar my othernetwork drivers.The driver allocates full frame size skbuffs for the Rx ring buffers atopen() time and passes the skb->data field to the Hamachi as receive databuffers. When an incoming frame is less than RX_COPYBREAK bytes long,a fresh skbuff is allocated and the frame is copied to the new skbuff.When the incoming frame is larger, the skbuff is passed directly up theprotocol stack and replaced by a newly allocated skbuff.The RX_COPYBREAK value is chosen to trade-off the memory wasted byusing a full-sized skbuff for small frames vs. the copying costs of largerframes. Gigabit cards are typically used on generously configured machinesand the underfilled buffers have negligible impact compared to the benefit ofa single allocation size, so the default value of zero results in nevercopying packets.IIIb/c. Transmit/Receive StructureThe Rx and Tx descriptor structure are straight-forward, with no historicalbaggage that must be explained. Unlike the awkward DBDMA structure, thereare no unused fields or option bits that had only one allowable setting.Two details should be noted about the descriptors: The chip supports both 32bit and 64 bit address structures, and the length field is overwritten onthe receive descriptors. The descriptor length is set in the control wordfor each channel. The development driver uses 32 bit addresses only, however64 bit addresses may be enabled for 64 bit architectures e.g. the Alpha.IIId. SynchronizationThis driver is very similar to my other network drivers.The driver runs as two independent, single-threaded flows of control. Oneis the send-packet routine, which enforces single-threaded use by thedev->tbusy flag. The other thread is the interrupt handler, which is singlethreaded by the hardware and other software.The send packet thread has partial control over the Tx ring and 'dev->tbusy'flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the nextqueue slot is empty, it clears the tbusy flag when finished otherwise it setsthe 'hmp->tx_full' flag.The interrupt handler has exclusive control over the Rx ring and records statsfrom the Tx ring. After reaping the stats, it marks the Tx queue entry asempty by incrementing the dirty_tx mark. Iff the 'hmp->tx_full' flag is set, itclears both the tx_full and tbusy flags.IV. NotesThanks to Kim Stearns of Packet Engines for providing a pair of GNIC-II boards.IVb. ReferencesHamachi Engineering Design Specification, 5/15/97(Note: This version was marked "Confidential".)IVc. ErrataNone noted. V. Recent Changes01/15/1999 EPK Enlargement of the TX and RX ring sizes. This appears to help avoid some stall conditions -- this needs further research.01/15/1999 EPK Creation of the hamachi_tx function. This function cleans the Tx ring and is called from hamachi_start_xmit (this used to be called from hamachi_interrupt but it tends to delay execution of the interrupt handler and thus reduce bandwidth by reducing the latency between hamachi_rx()'s). Notably, some modification has been made so that the cleaning loop checks only to make sure that the DescOwn bit isn't set in the status flag since the card is not required to set the entire flag to zero after processing.01/15/1999 EPK In the hamachi_start_tx function, the Tx ring full flag is checked before attempting to add a buffer to the ring. If the ring is full an attempt is made to free any dirty buffers and thus find space for the new buffer or the function returns non-zero which should case the scheduler to reschedule the buffer later.01/15/1999 EPK Some adjustments were made to the chip intialization. End-to-end flow control should now be fully active and the interrupt algorithm vars have been changed. These could probably use further tuning.01/15/1999 EPK Added the max_{rx,tx}_latency options. These are used to set the rx and tx latencies for the Hamachi interrupts. If you're having problems with network stalls, try setting these to higher values. Valid values are 0x00 through 0xff.01/15/1999 EPK In general, the overall bandwidth has increased and latencies are better (sometimes by a factor of 2). Stalls are rare at this point, however there still appears to be a bug somewhere between the hardware and driver. TCP checksum errors under load also appear to be eliminated at this point.01/18/1999 EPK Ensured that the DescEndRing bit was being set on both the Rx and Tx rings. This appears to have been affecting whether a particular peer-to-peer connection would hang under high load. I believe the Rx rings was typically getting set correctly, but the Tx ring wasn't getting the DescEndRing bit set during initialization. ??? Does this mean the hamachi card is using the DescEndRing in processing even if a particular slot isn't in use -- hypothetically, the card might be searching the entire Tx ring for slots with the DescOwn bit set and then processing them. If the DescEndRing bit isn't set, then it might just wander off through memory until it hits a chunk of data with that bit set and then looping back.02/09/1999 EPK Added Michel Mueller's TxDMA Interrupt and Tx-timeout problem (TxCmd and RxCmd need only to be set when idle or stopped.02/09/1999 EPK Added code to check/reset dev->tbusy in hamachi_interrupt. (Michel Mueller pointed out the ``permanently busy'' potential problem here).02/22/1999 EPK Added Pete Wyckoff's ioctl to control the Tx/Rx latencies. 02/23/1999 EPK Verified that the interrupt status field bits for Tx were incorrectly defined and corrected (as per Michel Mueller).02/23/1999 EPK Corrected the Tx full check to check that at least 4 slots were available before reseting the tbusy and tx_full flags (as per Michel Mueller).03/11/1999 EPK Added Pete Wyckoff's hardware checksumming support.12/31/1999 KDU Cleaned up assorted things and added Don's code to force32 bit.02/20/2000 KDU Some of the control was just plain odd. Cleaned up thehamachi_start_xmit() and hamachi_interrupt() code. There is still somere-structuring I would like to do. 03/01/2000 KDU Experimenting with a WIDE range of interrupt mitigationparameters on a dual P3-450 setup yielded the new default interruptmitigation parameters. Tx should interrupt VERY infrequently due toEric's scheme. Rx should be more often...03/13/2000 KDU Added a patch to make the Rx Checksum code interactnicely with non-linux machines. 03/13/2000 KDU Experimented with some of the configuration values: -It seems that enabling PCI performance commands for descriptors (changing RxDMACtrl and TxDMACtrl lower nibble from 5 to D) has minimal performance impact for any of my tests. (ttcp, netpipe, netperf) I will leave them that way until I hear further feedback. -Increasing the PCI_LATENCY_TIMER to 130 (2 + (burst size of 128 * (0 wait states + 1))) seems to slightly degrade performance. Leaving default at 64 pending further information.
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