gdth.h

Linux内核源代码 为压缩文件 是<<Linux内核>>一书中的源代码

/* PLX register structure (new PCI controllers) */
typedef struct {
    unchar              cfg_reg;        /* DPRAM cfg.(2:below 1MB,0:anywhere)*/
    unchar              unused1[0x3f];
    unchar volatile     sema0_reg;              /* command semaphore */
    unchar volatile     sema1_reg;              /* status semaphore */
    unchar              unused2[2];
    ushort volatile     status;                 /* command status */
    ushort              service;                /* service */
    ulong32             info[2];                /* additional info */
    unchar              unused3[0x10];
    unchar              ldoor_reg;              /* PCI to local doorbell */
    unchar              unused4[3];
    unchar volatile     edoor_reg;              /* local to PCI doorbell */
    unchar              unused5[3];
    unchar              control0;               /* control0 register(unused) */
    unchar              control1;               /* board interrupts enable */
    unchar              unused6[0x16];
} PACKED gdt6c_plx_regs;

/* DPRAM new PCI controllers */
typedef struct {
    union {
        gdt_dpr_if      ic;                     /* interface area */
        unchar          if_area[0x4000-sizeof(gdt_pci_sram)];
    } u;
    gdt_pci_sram        gdt6sr;                 /* SRAM structure */
} PACKED gdt6c_dpram_str;

/* i960 register structure (PCI MPR controllers) */
typedef struct {
    unchar              unused1[16];
    unchar volatile     sema0_reg;              /* command semaphore */
    unchar              unused2;
    unchar volatile     sema1_reg;              /* status semaphore */
    unchar              unused3;
    ushort volatile     status;                 /* command status */
    ushort              service;                /* service */
    ulong32             info[2];                /* additional info */
    unchar              ldoor_reg;              /* PCI to local doorbell */
    unchar              unused4[11];
    unchar volatile     edoor_reg;              /* local to PCI doorbell */
    unchar              unused5[7];
    unchar              edoor_en_reg;           /* board interrupts enable */
    unchar              unused6[27];
    ulong32             unused7[1004];          /* size: 4 KB */
} PACKED gdt6m_i960_regs;

/* DPRAM PCI MPR controllers */
typedef struct {
    gdt6m_i960_regs     i960r;                  /* 4KB i960 registers */
    union {
        gdt_dpr_if      ic;                     /* interface area */
        unchar          if_area[0x3000-sizeof(gdt_pci_sram)];
    } u;
    gdt_pci_sram        gdt6sr;                 /* SRAM structure */
} PACKED gdt6m_dpram_str;


/* PCI resources */
typedef struct {
    struct pci_dev      *pdev;
    ushort              device_id;              /* device ID (0,..,9) */
    unchar              bus;                    /* PCI bus */
    unchar              device_fn;              /* PCI device/function no. */
    ulong               dpmem;                  /* DPRAM address */
    ulong               io;                     /* IO address */
    ulong               io_mm;                  /* IO address mem. mapped */
    unchar              irq;                    /* IRQ */
} gdth_pci_str;


/* controller information structure */
typedef struct {
    ushort              type;                   /* controller class */
    ushort              raw_feat;               /* feat. raw service (s/g,..) */
    ulong32             stype;                  /* controller subtype */
    ushort              cache_feat;             /* feat. cache serv. (s/g,..) */
    ushort              bmic;                   /* BMIC address (EISA) */
    void                *brd;                   /* DPRAM address */
    ulong32             brd_phys;               /* slot number/BIOS address */
    gdt6c_plx_regs      *plx;                   /* PLX regs (new PCI contr.) */
    gdth_cmd_str        *pccb;                  /* address command structure */
    char                *pscratch;              /* scratch (DMA) buffer */
    unchar              scratch_busy;           /* in use? */
    unchar              scan_mode;              /* current scan mode */
    unchar              irq;                    /* IRQ */
    unchar              drq;                    /* DRQ (ISA controllers) */
    ushort              status;                 /* command status */
    ulong32             info;
    ulong32             info2;                  /* additional info */
    Scsi_Cmnd           *req_first;             /* top of request queue */
    struct {
        unchar          present;                /* Flag: host drive present? */
        unchar          is_logdrv;              /* Flag: logical drive (master)? */
        unchar          is_arraydrv;            /* Flag: array drive? */
        unchar          is_master;              /* Flag: array drive master? */
        unchar          is_parity;              /* Flag: parity drive? */
        unchar          is_hotfix;              /* Flag: hotfix drive? */
        unchar          master_no;              /* number of master drive */
        unchar          lock;                   /* drive locked? (hot plug) */
        unchar          heads;                  /* mapping */
        unchar          secs;
        ushort          devtype;                /* further information */
        ulong32         size;                   /* capacity */
        unchar          ldr_no;                 /* log. drive no. */
        unchar          rw_attribs;             /* r/w attributes */
        ulong32         start_sec;              /* start sector */
    } hdr[MAX_HDRIVES];                         /* host drives */
    struct {
        unchar          lock;                   /* channel locked? (hot plug) */
        unchar          pdev_cnt;               /* physical device count */
        unchar          local_no;               /* local channel number */
	unchar          io_cnt[MAXID];          /* current IO count */
        ulong32         address;                /* channel address */
        ulong32         id_list[MAXID];         /* IDs of the phys. devices */
    } raw[MAXBUS];                              /* SCSI channels */
    struct {
        Scsi_Cmnd       *cmnd;                  /* pending request */
        ushort          service;                /* service */
    } cmd_tab[GDTH_MAXCMDS];                    /* table of pend. requests */
    unchar              bus_cnt;                /* SCSI bus count */
    unchar              tid_cnt;                /* Target ID count */
    unchar              bus_id[MAXBUS];         /* IOP IDs */
    unchar              virt_bus;               /* number of virtual bus */
    unchar              more_proc;              /* more /proc info supported */
    ushort              cmd_cnt;                /* command count in DPRAM */
    ushort              cmd_len;                /* length of actual command */
    ushort              cmd_offs_dpmem;         /* actual offset in DPRAM */
    ushort              ic_all_size;            /* sizeof DPRAM interf. area */
    gdth_cpar_str       cpar;                   /* controller cache par. */
    gdth_bfeat_str      bfeat;                  /* controller features */
    gdth_binfo_str      binfo;                  /* controller info */
    spinlock_t          smp_lock;
} gdth_ha_str;

/* structure for scsi_register(), SCSI bus != 0 */
typedef struct {
    ushort      hanum;
    ushort      busnum;
} gdth_num_str;

/* structure for scsi_register() */
typedef struct {
    gdth_num_str        numext;                 /* must be the first element */
    gdth_ha_str         haext;
    gdth_cmd_str        cmdext;
} gdth_ext_str;


/* INQUIRY data format */
typedef struct {
    unchar      type_qual;
    unchar      modif_rmb;
    unchar      version;
    unchar      resp_aenc;
    unchar      add_length;
    unchar      reserved1;
    unchar      reserved2;
    unchar      misc;
    unchar      vendor[8];
    unchar      product[16];
    unchar      revision[4];
} PACKED gdth_inq_data;

/* READ_CAPACITY data format */
typedef struct {
    ulong32     last_block_no;
    ulong32     block_length;
} PACKED gdth_rdcap_data;

/* REQUEST_SENSE data format */
typedef struct {
    unchar      errorcode;
    unchar      segno;
    unchar      key;
    ulong32     info;
    unchar      add_length;
    ulong32     cmd_info;
    unchar      adsc;
    unchar      adsq;
    unchar      fruc;
    unchar      key_spec[3];
} PACKED gdth_sense_data;

/* MODE_SENSE data format */
typedef struct {
    struct {
        unchar  data_length;
        unchar  med_type;
        unchar  dev_par;
        unchar  bd_length;
    } PACKED hd;
    struct {
        unchar  dens_code;
        unchar  block_count[3];
        unchar  reserved;
        unchar  block_length[3];
    } PACKED bd;
} PACKED gdth_modep_data;

/* stack frame */
typedef struct {
    ulong       b[10];                          /* 32/64 bit compiler ! */
} PACKED gdth_stackframe;


/* function prototyping */

int gdth_detect(Scsi_Host_Template *);
int gdth_release(struct Scsi_Host *);
int gdth_command(Scsi_Cmnd *);
int gdth_queuecommand(Scsi_Cmnd *,void (*done)(Scsi_Cmnd *));
int gdth_abort(Scsi_Cmnd *);
int gdth_reset(Scsi_Cmnd *, unsigned int reset_flags);
const char *gdth_info(struct Scsi_Host *);

int gdth_bios_param(Disk *,kdev_t,int *);
int gdth_proc_info(char *,char **,off_t,int,int,int);
int gdth_eh_abort(Scsi_Cmnd *scp);
int gdth_eh_device_reset(Scsi_Cmnd *scp);
int gdth_eh_bus_reset(Scsi_Cmnd *scp);
int gdth_eh_host_reset(Scsi_Cmnd *scp);
#define GDTH { proc_name:       "gdth",                          \
               proc_info:       gdth_proc_info,                  \
               name:            "GDT SCSI Disk Array Controller",\
               detect:          gdth_detect,                     \
               release:         gdth_release,                    \
               info:            gdth_info,                       \
               command:         gdth_command,                    \
               queuecommand:    gdth_queuecommand,               \
               eh_abort_handler: gdth_eh_abort,                  \
               eh_device_reset_handler: gdth_eh_device_reset,    \
               eh_bus_reset_handler: gdth_eh_bus_reset,          \
               eh_host_reset_handler: gdth_eh_host_reset,        \
               abort:           gdth_abort,                      \
               reset:           gdth_reset,                      \
               bios_param:      gdth_bios_param,                 \
               can_queue:       GDTH_MAXCMDS,                    \
               this_id:         -1,                              \
               sg_tablesize:    GDTH_MAXSG,                      \
               cmd_per_lun:     GDTH_MAXC_P_L,                   \
               present:         0,                               \
               unchecked_isa_dma: 1,                             \
               use_clustering:  ENABLE_CLUSTERING,               \
               use_new_eh_code: 1       /* use new error code */ }    
#endif