sxwindow.h

Linux内核源代码 为压缩文件 是<<Linux内核>>一书中的源代码

/************************************************************************/
/*									*/
/*	Title		:	SX Shared Memory Window Structure	*/
/*									*/
/*	Author		:	N.P.Vassallo				*/
/*									*/
/*	Creation	:	16th March 1998				*/
/*									*/
/*	Version		:	3.0.0					*/
/*									*/
/*	Copyright	:	(c) Specialix International Ltd. 1998	*/
/*									*/
/*	Description	:	Prototypes, structures and definitions	*/
/*				describing the SX/SI/XIO cards shared	*/
/*				memory window structure:		*/
/*					SXCARD				*/
/*					SXMODULE			*/
/*					SXCHANNEL			*/
/*									*/
/************************************************************************/

/* History...

3.0.0	16/03/98 NPV	Creation. (based on STRUCT.H)

*/

#ifndef	_sxwindow_h				/* If SXWINDOW.H not already defined */
#define	_sxwindow_h    1

/*****************************************************************************
***************************                        ***************************
***************************   Common Definitions   ***************************
***************************                        ***************************
*****************************************************************************/

typedef	struct	_SXCARD		*PSXCARD;	/* SXCARD structure pointer */
typedef	struct	_SXMODULE	*PMOD;		/* SXMODULE structure pointer */
typedef	struct	_SXCHANNEL	*PCHAN;		/* SXCHANNEL structure pointer */

/*****************************************************************************
*********************************            *********************************
*********************************   SXCARD   *********************************
*********************************            *********************************
*****************************************************************************/

typedef	struct	_SXCARD
{
	BYTE	cc_init_status;			/* 0x00 Initialisation status */
	BYTE	cc_mem_size;			/* 0x01 Size of memory on card */
	WORD	cc_int_count;			/* 0x02 Interrupt count */
	WORD	cc_revision;			/* 0x04 Download code revision */
	BYTE	cc_isr_count;			/* 0x06 Count when ISR is run */
	BYTE	cc_main_count;			/* 0x07 Count when main loop is run */
	WORD	cc_int_pending;			/* 0x08 Interrupt pending */
	WORD	cc_poll_count;			/* 0x0A Count when poll is run */
	BYTE	cc_int_set_count;		/* 0x0C Count when host interrupt is set */
	BYTE	cc_rfu[0x80 - 0x0D];		/* 0x0D Pad structure to 128 bytes (0x80) */

} SXCARD;

/* SXCARD.cc_init_status definitions... */
#define 	ADAPTERS_FOUND		(BYTE)0x01
#define 	NO_ADAPTERS_FOUND	(BYTE)0xFF

/* SXCARD.cc_mem_size definitions... */
#define 	SX_MEMORY_SIZE		(BYTE)0x40

/* SXCARD.cc_int_count definitions... */
#define 	INT_COUNT_DEFAULT	100	/* Hz */

/*****************************************************************************
********************************              ********************************
********************************   SXMODULE   ********************************
********************************              ********************************
*****************************************************************************/

#define	TOP_POINTER(a)		((a)|0x8000)	/* Sets top bit of word */
#define UNTOP_POINTER(a)	((a)&~0x8000)	/* Clears top bit of word */

typedef	struct	_SXMODULE
{
	WORD	mc_next;			/* 0x00 Next module "pointer" (ORed with 0x8000) */
	BYTE	mc_type;			/* 0x02 Type of TA in terms of number of channels */
	BYTE	mc_mod_no;			/* 0x03 Module number on SI bus cable (0 closest to card) */
	BYTE	mc_dtr;				/* 0x04 Private DTR copy (TA only) */
	BYTE	mc_rfu1;			/* 0x05 Reserved */
	WORD	mc_uart;			/* 0x06 UART base address for this module */
	BYTE	mc_chip;			/* 0x08 Chip type / number of ports */
	BYTE	mc_current_uart;		/* 0x09 Current uart selected for this module */
#ifdef	DOWNLOAD
	PCHAN	mc_chan_pointer[8];		/* 0x0A Pointer to each channel structure */
#else
	WORD	mc_chan_pointer[8];		/* 0x0A Define as WORD if not compiling into download */
#endif
	WORD	mc_rfu2;			/* 0x1A Reserved */
	BYTE	mc_opens1;			/* 0x1C Number of open ports on first four ports on MTA/SXDC */
	BYTE	mc_opens2;			/* 0x1D Number of open ports on second four ports on MTA/SXDC */
	BYTE	mc_mods;			/* 0x1E Types of connector module attached to MTA/SXDC */
	BYTE	mc_rev1;			/* 0x1F Revision of first CD1400 on MTA/SXDC */
	BYTE	mc_rev2;			/* 0x20 Revision of second CD1400 on MTA/SXDC */
	BYTE	mc_mtaasic_rev;			/* 0x21 Revision of MTA ASIC 1..4 -> A, B, C, D */
	BYTE	mc_rfu3[0x100 - 0x22];		/* 0x22 Pad structure to 256 bytes (0x100) */

} SXMODULE;

/* SXMODULE.mc_type definitions... */
#define		FOUR_PORTS	(BYTE)4
#define 	EIGHT_PORTS	(BYTE)8

/* SXMODULE.mc_chip definitions... */
#define 	CHIP_MASK	0xF0
#define		TA		(BYTE)0
#define 	TA4		(TA | FOUR_PORTS)
#define 	TA8		(TA | EIGHT_PORTS)
#define		TA4_ASIC	(BYTE)0x0A
#define		TA8_ASIC	(BYTE)0x0B
#define 	MTA_CD1400	(BYTE)0x28
#define 	SXDC		(BYTE)0x48

/* SXMODULE.mc_mods definitions... */
#define		MOD_RS232DB25	0x00		/* RS232 DB25 (socket/plug) */
#define		MOD_RS232RJ45	0x01		/* RS232 RJ45 (shielded/opto-isolated) */
#define		MOD_RESERVED_2	0x02		/* Reserved (RS485) */
#define		MOD_RS422DB25	0x03		/* RS422 DB25 Socket */
#define		MOD_RESERVED_4	0x04		/* Reserved */
#define		MOD_PARALLEL	0x05		/* Parallel */
#define		MOD_RESERVED_6	0x06		/* Reserved (RS423) */
#define		MOD_RESERVED_7	0x07		/* Reserved */
#define		MOD_2_RS232DB25	0x08		/* Rev 2.0 RS232 DB25 (socket/plug) */
#define		MOD_2_RS232RJ45	0x09		/* Rev 2.0 RS232 RJ45 */
#define		MOD_RESERVED_A	0x0A		/* Rev 2.0 Reserved */
#define		MOD_2_RS422DB25	0x0B		/* Rev 2.0 RS422 DB25 */
#define		MOD_RESERVED_C	0x0C		/* Rev 2.0 Reserved */
#define		MOD_2_PARALLEL	0x0D		/* Rev 2.0 Parallel */
#define		MOD_RESERVED_E	0x0E		/* Rev 2.0 Reserved */
#define		MOD_BLANK	0x0F		/* Blank Panel */

/*****************************************************************************
********************************               *******************************
********************************   SXCHANNEL   *******************************
********************************               *******************************
*****************************************************************************/

#define		TX_BUFF_OFFSET		0x60	/* Transmit buffer offset in channel structure */
#define		BUFF_POINTER(a)		(((a)+TX_BUFF_OFFSET)|0x8000)
#define		UNBUFF_POINTER(a)	(jet_channel*)(((a)&~0x8000)-TX_BUFF_OFFSET) 
#define 	BUFFER_SIZE		256
#define 	HIGH_WATER		((BUFFER_SIZE / 4) * 3)
#define 	LOW_WATER		(BUFFER_SIZE / 4)

typedef	struct	_SXCHANNEL
{
	WORD	next_item;			/* 0x00 Offset from window base of next channels hi_txbuf (ORred with 0x8000) */
	WORD 	addr_uart;			/* 0x02 INTERNAL pointer to uart address. Includes FASTPATH bit */
	WORD	module;				/* 0x04 Offset from window base of parent SXMODULE structure */
	BYTE 	type;				/* 0x06 Chip type / number of ports (copy of mc_chip) */
	BYTE	chan_number;			/* 0x07 Channel number on the TA/MTA/SXDC */
	WORD	xc_status;			/* 0x08 Flow control and I/O status */
	BYTE	hi_rxipos;			/* 0x0A Receive buffer input index */
	BYTE	hi_rxopos;			/* 0x0B Receive buffer output index */
	BYTE	hi_txopos;			/* 0x0C Transmit buffer output index */
	BYTE	hi_txipos;			/* 0x0D Transmit buffer input index */
	BYTE	hi_hstat;			/* 0x0E Command register */
	BYTE	dtr_bit;			/* 0x0F INTERNAL DTR control byte (TA only) */
	BYTE	txon;				/* 0x10 INTERNAL copy of hi_txon */
	BYTE	txoff;				/* 0x11 INTERNAL copy of hi_txoff */
	BYTE	rxon;				/* 0x12 INTERNAL copy of hi_rxon */
	BYTE	rxoff;				/* 0x13 INTERNAL copy of hi_rxoff */
	BYTE	hi_mr1;				/* 0x14 Mode Register 1 (databits,parity,RTS rx flow)*/
	BYTE	hi_mr2;				/* 0x15 Mode Register 2 (stopbits,local,CTS tx flow)*/
	BYTE	hi_csr;				/* 0x16 Clock Select Register (baud rate) */
	BYTE	hi_op;				/* 0x17 Modem Output Signal */
	BYTE	hi_ip;				/* 0x18 Modem Input Signal */
	BYTE	hi_state;			/* 0x19 Channel status */
	BYTE	hi_prtcl;			/* 0x1A Channel protocol (flow control) */
	BYTE	hi_txon;			/* 0x1B Transmit XON character */
	BYTE	hi_txoff;			/* 0x1C Transmit XOFF character */
	BYTE	hi_rxon;			/* 0x1D Receive XON character */
	BYTE	hi_rxoff;			/* 0x1E Receive XOFF character */
	BYTE	close_prev;			/* 0x1F INTERNAL channel previously closed flag */
	BYTE	hi_break;			/* 0x20 Break and error control */
	BYTE	break_state;			/* 0x21 INTERNAL copy of hi_break */
	BYTE	hi_mask;			/* 0x22 Mask for received data */
	BYTE	mask;				/* 0x23 INTERNAL copy of hi_mask */
	BYTE	mod_type;			/* 0x24 MTA/SXDC hardware module type */
	BYTE	ccr_state;			/* 0x25 INTERNAL MTA/SXDC state of CCR register */
	BYTE	ip_mask;			/* 0x26 Input handshake mask */
	BYTE	hi_parallel;			/* 0x27 Parallel port flag */
	BYTE	par_error;			/* 0x28 Error code for parallel loopback test */
	BYTE	any_sent;			/* 0x29 INTERNAL data sent flag */
	BYTE	asic_txfifo_size;		/* 0x2A INTERNAL SXDC transmit FIFO size */
	BYTE	rfu1[2];			/* 0x2B Reserved */
	BYTE	csr;				/* 0x2D INTERNAL copy of hi_csr */
#ifdef	DOWNLOAD
	PCHAN	nextp;				/* 0x2E Offset from window base of next channel structure */
#else