📄 chrp_pci.c
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/* * CHRP pci routines. */#include <linux/config.h>#include <linux/kernel.h>#include <linux/pci.h>#include <linux/delay.h>#include <linux/string.h>#include <linux/init.h>#include <linux/openpic.h>#include <linux/ide.h>#include <asm/io.h>#include <asm/pgtable.h>#include <asm/irq.h>#include <asm/hydra.h>#include <asm/prom.h>#include <asm/gg2.h>#include <asm/machdep.h>#include <asm/init.h>#include "pci.h"#ifdef CONFIG_POWER4static unsigned long pci_address_offset(int, unsigned int);#endif /* CONFIG_POWER4 *//* LongTrail */#define pci_config_addr(bus, dev, offset) \(GG2_PCI_CONFIG_BASE | ((bus)<<16) | ((dev)<<8) | (offset))volatile struct Hydra *Hydra = NULL;/* * The VLSI Golden Gate II has only 512K of PCI configuration space, so we * limit the bus number to 3 bits */int __chrp gg2_pcibios_read_config_byte(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned char *val){ if (bus > 7) { *val = 0xff; return PCIBIOS_DEVICE_NOT_FOUND; } *val = in_8((unsigned char *)pci_config_addr(bus, dev_fn, offset)); return PCIBIOS_SUCCESSFUL;}int __chrp gg2_pcibios_read_config_word(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned short *val){ if (bus > 7) { *val = 0xffff; return PCIBIOS_DEVICE_NOT_FOUND; } *val = in_le16((unsigned short *)pci_config_addr(bus, dev_fn, offset)); return PCIBIOS_SUCCESSFUL;}int __chrp gg2_pcibios_read_config_dword(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned int *val){ if (bus > 7) { *val = 0xffffffff; return PCIBIOS_DEVICE_NOT_FOUND; } *val = in_le32((unsigned int *)pci_config_addr(bus, dev_fn, offset)); return PCIBIOS_SUCCESSFUL;}int __chrp gg2_pcibios_write_config_byte(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned char val){ if (bus > 7) return PCIBIOS_DEVICE_NOT_FOUND; out_8((unsigned char *)pci_config_addr(bus, dev_fn, offset), val); return PCIBIOS_SUCCESSFUL;}int __chrp gg2_pcibios_write_config_word(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned short val){ if (bus > 7) return PCIBIOS_DEVICE_NOT_FOUND; out_le16((unsigned short *)pci_config_addr(bus, dev_fn, offset), val); return PCIBIOS_SUCCESSFUL;}int __chrp gg2_pcibios_write_config_dword(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned int val){ if (bus > 7) return PCIBIOS_DEVICE_NOT_FOUND; out_le32((unsigned int *)pci_config_addr(bus, dev_fn, offset), val); return PCIBIOS_SUCCESSFUL;}#define python_config_address(bus) (unsigned *)((0xfef00000+0xf8000)-(bus*0x100000))#define python_config_data(bus) ((0xfef00000+0xf8010)-(bus*0x100000))#define PYTHON_CFA(b, d, o) (0x80 | ((b<<6) << 8) | ((d) << 16) \ | (((o) & ~3) << 24))unsigned int python_busnr = 0;int __chrp python_pcibios_read_config_byte(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned char *val){ if (bus > python_busnr) { *val = 0xff; return PCIBIOS_DEVICE_NOT_FOUND; } out_be32( python_config_address( bus ), PYTHON_CFA(bus,dev_fn,offset)); *val = in_8((unsigned char *)python_config_data(bus) + (offset&3)); return PCIBIOS_SUCCESSFUL;}int __chrp python_pcibios_read_config_word(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned short *val){ if (bus > python_busnr) { *val = 0xffff; return PCIBIOS_DEVICE_NOT_FOUND; } out_be32( python_config_address( bus ), PYTHON_CFA(bus,dev_fn,offset)); *val = in_le16((unsigned short *)(python_config_data(bus) + (offset&3))); return PCIBIOS_SUCCESSFUL;}int __chrp python_pcibios_read_config_dword(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned int *val){ if (bus > python_busnr) { *val = 0xffffffff; return PCIBIOS_DEVICE_NOT_FOUND; } out_be32( python_config_address( bus ), PYTHON_CFA(bus,dev_fn,offset)); *val = in_le32((unsigned *)python_config_data(bus)); return PCIBIOS_SUCCESSFUL;}int __chrp python_pcibios_write_config_byte(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned char val){ if (bus > python_busnr) return PCIBIOS_DEVICE_NOT_FOUND; out_be32( python_config_address( bus ), PYTHON_CFA(bus,dev_fn,offset)); out_8((volatile unsigned char *)python_config_data(bus) + (offset&3), val); return PCIBIOS_SUCCESSFUL;}int __chrp python_pcibios_write_config_word(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned short val){ if (bus > python_busnr) return PCIBIOS_DEVICE_NOT_FOUND; out_be32( python_config_address( bus ), PYTHON_CFA(bus,dev_fn,offset)); out_le16((volatile unsigned short *)python_config_data(bus) + (offset&3), val); return PCIBIOS_SUCCESSFUL;}int __chrp python_pcibios_write_config_dword(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned int val){ if (bus > python_busnr) return PCIBIOS_DEVICE_NOT_FOUND; out_be32( python_config_address( bus ), PYTHON_CFA(bus,dev_fn,offset)); out_le32((unsigned *)python_config_data(bus) + (offset&3), val); return PCIBIOS_SUCCESSFUL;}int __chrp rtas_pcibios_read_config_byte(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned char *val){ unsigned long addr = (offset&0xff) | ((dev_fn&0xff)<<8) | ((bus & 0xff)<<16); unsigned long ret; if (call_rtas( "read-pci-config", 2, 2, &ret, addr, 1) != 0) return PCIBIOS_DEVICE_NOT_FOUND; *val = ret; return PCIBIOS_SUCCESSFUL;}int __chrp rtas_pcibios_read_config_word(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned short *val){ unsigned long addr = (offset&0xff) | ((dev_fn&0xff)<<8) | ((bus & 0xff)<<16); unsigned long ret; if (call_rtas("read-pci-config", 2, 2, &ret, addr, 2) != 0) return PCIBIOS_DEVICE_NOT_FOUND; *val = ret; return PCIBIOS_SUCCESSFUL;}int __chrp rtas_pcibios_read_config_dword(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned int *val){ unsigned long addr = (offset&0xff) | ((dev_fn&0xff)<<8) | ((bus & 0xff)<<16); unsigned long ret; if (call_rtas("read-pci-config", 2, 2, &ret, addr, 4) != 0) return PCIBIOS_DEVICE_NOT_FOUND; *val = ret; return PCIBIOS_SUCCESSFUL;}int __chrp rtas_pcibios_write_config_byte(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned char val){ unsigned long addr = (offset&0xff) | ((dev_fn&0xff)<<8) | ((bus & 0xff)<<16); if ( call_rtas( "write-pci-config", 3, 1, NULL, addr, 1, (ulong)val ) != 0 ) return PCIBIOS_DEVICE_NOT_FOUND; return PCIBIOS_SUCCESSFUL;}int __chrp rtas_pcibios_write_config_word(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned short val){ unsigned long addr = (offset&0xff) | ((dev_fn&0xff)<<8) | ((bus & 0xff)<<16); if ( call_rtas( "write-pci-config", 3, 1, NULL, addr, 2, (ulong)val ) != 0 ) return PCIBIOS_DEVICE_NOT_FOUND; return PCIBIOS_SUCCESSFUL;}int __chrp rtas_pcibios_write_config_dword(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned int val){ unsigned long addr = (offset&0xff) | ((dev_fn&0xff)<<8) | ((bus & 0xff)<<16); if ( call_rtas( "write-pci-config", 3, 1, NULL, addr, 4, (ulong)val ) != 0 ) return PCIBIOS_DEVICE_NOT_FOUND; return PCIBIOS_SUCCESSFUL;} /* * Temporary fixes for PCI devices. These should be replaced by OF query * code -- Geert */static u_char hydra_openpic_initsenses[] __initdata = { 1, /* HYDRA_INT_SIO */ 0, /* HYDRA_INT_SCSI_DMA */ 0, /* HYDRA_INT_SCCA_TX_DMA */ 0, /* HYDRA_INT_SCCA_RX_DMA */ 0, /* HYDRA_INT_SCCB_TX_DMA */ 0, /* HYDRA_INT_SCCB_RX_DMA */ 1, /* HYDRA_INT_SCSI */ 1, /* HYDRA_INT_SCCA */ 1, /* HYDRA_INT_SCCB */ 1, /* HYDRA_INT_VIA */ 1, /* HYDRA_INT_ADB */ 0, /* HYDRA_INT_ADB_NMI */ /* all others are 1 (= default) */};int __inithydra_init(void){ struct device_node *np; np = find_devices("mac-io"); if (np == NULL || np->n_addrs == 0) { printk(KERN_WARNING "Warning: no mac-io found\n"); return 0; } Hydra = ioremap(np->addrs[0].address, np->addrs[0].size);
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