📄 chrp_setup.c
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/* * linux/arch/ppc/kernel/setup.c * * Copyright (C) 1995 Linus Torvalds * Adapted from 'alpha' version by Gary Thomas * Modified by Cort Dougan (cort@cs.nmt.edu) *//* * bootup setup stuff.. */#include <linux/config.h>#include <linux/errno.h>#include <linux/sched.h>#include <linux/kernel.h>#include <linux/mm.h>#include <linux/stddef.h>#include <linux/unistd.h>#include <linux/ptrace.h>#include <linux/malloc.h>#include <linux/user.h>#include <linux/a.out.h>#include <linux/tty.h>#include <linux/major.h>#include <linux/interrupt.h>#include <linux/reboot.h>#include <linux/init.h>#include <linux/blk.h>#include <linux/ioport.h>#include <linux/console.h>#include <linux/pci.h>#include <linux/openpic.h>#include <linux/version.h>#include <linux/adb.h>#include <linux/module.h>#include <linux/delay.h>#include <linux/ide.h>#include <asm/mmu.h>#include <asm/processor.h>#include <asm/io.h>#include <asm/pgtable.h>#include <asm/prom.h>#include <asm/gg2.h>#include <asm/pci-bridge.h>#include <asm/dma.h>#include <asm/machdep.h>#include <asm/irq.h>#include <asm/hydra.h>#include <asm/keyboard.h>#include <asm/init.h>#include <asm/time.h>#include "local_irq.h"#include "i8259.h"#include "open_pic.h"#include "xics.h"extern volatile unsigned char *chrp_int_ack_special;unsigned long chrp_get_rtc_time(void);int chrp_set_rtc_time(unsigned long nowtime);void chrp_calibrate_decr(void);long chrp_time_init(void);void chrp_setup_pci_ptrs(void);void chrp_event_scan(void);void rtas_display_progress(char *, unsigned short);void rtas_indicator_progress(char *, unsigned short);void bootx_text_progress(char *, unsigned short);extern int pckbd_setkeycode(unsigned int scancode, unsigned int keycode);extern int pckbd_getkeycode(unsigned int scancode);extern int pckbd_translate(unsigned char scancode, unsigned char *keycode, char raw_mode);extern char pckbd_unexpected_up(unsigned char keycode);extern void pckbd_leds(unsigned char leds);extern void pckbd_init_hw(void);extern unsigned char pckbd_sysrq_xlate[128];extern int mackbd_setkeycode(unsigned int scancode, unsigned int keycode);extern int mackbd_getkeycode(unsigned int scancode);extern int mackbd_translate(unsigned char scancode, unsigned char *keycode, char raw_mode);extern char mackbd_unexpected_up(unsigned char keycode);extern void mackbd_leds(unsigned char leds);extern void mackbd_init_hw(void);extern unsigned char mackbd_sysrq_xlate[128];kdev_t boot_dev;extern PTE *Hash, *Hash_end;extern unsigned long Hash_size, Hash_mask;extern int probingmem;extern unsigned long loops_per_sec;extern int bootx_text_mapped;static int max_width;unsigned long empty_zero_page[1024];#ifdef CONFIG_BLK_DEV_RAMextern int rd_doload; /* 1 = load ramdisk, 0 = don't load */extern int rd_prompt; /* 1 = prompt for ramdisk, 0 = don't prompt */extern int rd_image_start; /* starting block # of image */#endifstatic const char *gg2_memtypes[4] = { "FPM", "SDRAM", "EDO", "BEDO"};static const char *gg2_cachesizes[4] = { "256 KB", "512 KB", "1 MB", "Reserved"};static const char *gg2_cachetypes[4] = { "Asynchronous", "Reserved", "Flow-Through Synchronous", "Pipelined Synchronous"};static const char *gg2_cachemodes[4] = { "Disabled", "Write-Through", "Copy-Back", "Transparent Mode"};int __chrpchrp_get_cpuinfo(char *buffer){ int i, len, sdramen; unsigned int t; struct device_node *root; const char *model = ""; root = find_path_device("/"); if (root) model = get_property(root, "model", NULL); len = sprintf(buffer,"machine\t\t: CHRP %s\n", model); /* longtrail (goldengate) stuff */ if ( !strncmp( model, "IBM,LongTrail", 13 ) ) { /* VLSI VAS96011/12 `Golden Gate 2' */ /* Memory banks */ sdramen = (in_le32((unsigned *)(GG2_PCI_CONFIG_BASE+ GG2_PCI_DRAM_CTRL)) >>31) & 1; for (i = 0; i < (sdramen ? 4 : 6); i++) { t = in_le32((unsigned *)(GG2_PCI_CONFIG_BASE+ GG2_PCI_DRAM_BANK0+ i*4)); if (!(t & 1)) continue; switch ((t>>8) & 0x1f) { case 0x1f: model = "4 MB"; break; case 0x1e: model = "8 MB"; break; case 0x1c: model = "16 MB"; break; case 0x18: model = "32 MB"; break; case 0x10: model = "64 MB"; break; case 0x00: model = "128 MB"; break; default: model = "Reserved"; break; } len += sprintf(buffer+len, "memory bank %d\t: %s %s\n", i, model, gg2_memtypes[sdramen ? 1 : ((t>>1) & 3)]); } /* L2 cache */ t = in_le32((unsigned *)(GG2_PCI_CONFIG_BASE+GG2_PCI_CC_CTRL)); len += sprintf(buffer+len, "board l2\t: %s %s (%s)\n", gg2_cachesizes[(t>>7) & 3], gg2_cachetypes[(t>>2) & 3], gg2_cachemodes[t & 3]); } return len;}/* * Fixes for the National Semiconductor PC78308VUL SuperI/O * * Some versions of Open Firmware incorrectly initialize the IRQ settings * for keyboard and mouse */static inline void __init sio_write(u8 val, u8 index){ outb(index, 0x15c); outb(val, 0x15d);}static inline u8 __init sio_read(u8 index){ outb(index, 0x15c); return inb(0x15d);}static void __init sio_fixup_irq(const char *name, u8 device, u8 level, u8 type){ u8 level0, type0, active; struct device_node *root; root = find_path_device("/"); if (root && !strncmp(get_property(root, "model", NULL), "IBM,LongTrail", 13 ) ) { /* select logical device */ sio_write(device, 0x07); active = sio_read(0x30); level0 = sio_read(0x70); type0 = sio_read(0x71); printk("sio: %s irq level %d, type %d, %sactive: ", name, level0, type0, !active ? "in" : ""); if (level0 == level && type0 == type && active) printk("OK\n"); else { printk("remapping to level %d, type %d, active\n", level, type); sio_write(0x01, 0x30); sio_write(level, 0x70); sio_write(type, 0x71); } }}static void __init sio_init(void){ /* logical device 0 (KBC/Keyboard) */ sio_fixup_irq("keyboard", 0, 1, 2); /* select logical device 1 (KBC/Mouse) */ sio_fixup_irq("mouse", 1, 12, 2);}void __initchrp_setup_arch(void){ extern char cmd_line[]; struct device_node *device; /* init to some ~sane value until calibrate_delay() runs */ loops_per_sec = 50000000;#ifdef CONFIG_BLK_DEV_INITRD /* this is fine for chrp */ initrd_below_start_ok = 1; if (initrd_start) ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0); else#endif ROOT_DEV = to_kdev_t(0x0802); /* sda2 (sda1 is for the kernel) */ printk("Boot arguments: %s\n", cmd_line);#ifndef CONFIG_PPC64BRIDGE /* PCI bridge config space access area - * appears to be not in devtree on longtrail. */ ioremap(GG2_PCI_CONFIG_BASE, 0x80000); /* * Temporary fixes for PCI devices. * -- Geert */ hydra_init(); /* Mac I/O */#endif /* CONFIG_PPC64BRIDGE */#ifndef CONFIG_POWER4 /* Some IBM machines don't have the hydra -- Cort */ if ( !OpenPIC ) { unsigned long *opprop; opprop = (unsigned long *)get_property(find_path_device("/"), "platform-open-pic", NULL); if (opprop != 0) { printk("OpenPIC addrs: %lx %lx %lx\n", opprop[0], opprop[1], opprop[2]); OpenPIC = ioremap(opprop[0], sizeof(struct OpenPIC)); } }#endif /* * Fix the Super I/O configuration */ sio_init();#ifdef CONFIG_DUMMY_CONSOLE conswitchp = &dummy_con;#endif#ifndef CONFIG_PPC64BRIDGE pmac_find_bridges();#endif /* CONFIG_PPC64BRIDGE */ /* Get the event scan rate for the rtas so we know how * often it expects a heartbeat. -- Cort */ if ( rtas_data ) { struct property *p; device = find_devices("rtas"); for ( p = device->properties; p && strncmp(p->name, "rtas-event-scan-rate", 20); p = p->next ) /* nothing */ ; if ( p && *(unsigned long *)p->value ) { ppc_md.heartbeat = chrp_event_scan; ppc_md.heartbeat_reset = (HZ/(*(unsigned long *)p->value)*30)-1; ppc_md.heartbeat_count = 1; printk("RTAS Event Scan Rate: %lu (%lu jiffies)\n", *(unsigned long *)p->value, ppc_md.heartbeat_reset ); } }}void __chrpchrp_event_scan(void){ unsigned char log[1024]; unsigned long ret = 0; /* XXX: we should loop until the hardware says no more error logs -- Cort */ call_rtas( "event-scan", 4, 1, &ret, 0xffffffff, 0, __pa(log), 1024 ); ppc_md.heartbeat_count = ppc_md.heartbeat_reset;} void __chrpchrp_restart(char *cmd){ printk("RTAS system-reboot returned %d\n", call_rtas("system-reboot", 0, 1, NULL)); for (;;);}void __chrpchrp_power_off(void){ /* allow power on only with power button press */ printk("RTAS power-off returned %d\n", call_rtas("power-off", 2, 1, NULL,0xffffffff,0xffffffff)); for (;;);}void __chrpchrp_halt(void){ chrp_power_off();}u_int __chrpchrp_irq_cannonicalize(u_int irq){ if (irq == 2) { return 9; } else {
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