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📄 ptrace.c

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/* * Kernel support for the ptrace() and syscall tracing interfaces. * * Copyright (C) 1999-2000 Hewlett-Packard Co * Copyright (C) 1999-2000 David Mosberger-Tang <davidm@hpl.hp.com> * * Derived from the x86 and Alpha versions.  Most of the code in here * could actually be factored into a common set of routines. */#include <linux/config.h>#include <linux/kernel.h>#include <linux/sched.h>#include <linux/mm.h>#include <linux/errno.h>#include <linux/ptrace.h>#include <linux/smp_lock.h>#include <linux/user.h>#include <asm/pgtable.h>#include <asm/processor.h>#include <asm/ptrace_offsets.h>#include <asm/rse.h>#include <asm/system.h>#include <asm/uaccess.h>/* * Bits in the PSR that we allow ptrace() to change: *	be, up, ac, mfl, mfh (the user mask; five bits total) *	db (debug breakpoint fault; one bit) *	id (instruction debug fault disable; one bit) *	dd (data debug fault disable; one bit) *	ri (restart instruction; two bits) *	is (instruction set; one bit) */#define IPSR_WRITE_MASK \	(IA64_PSR_UM | IA64_PSR_DB | IA64_PSR_IS | IA64_PSR_ID | IA64_PSR_DD | IA64_PSR_RI)#define IPSR_READ_MASK	IPSR_WRITE_MASK#ifdef CONFIG_IA64_NEW_UNWIND#define PTRACE_DEBUG	1#if PTRACE_DEBUG# define dprintk(format...)	printk(format)# define inline#else# define dprintk(format...)#endif/* * Collect the NaT bits for r1-r31 from scratch_unat and return a NaT * bitset where bit i is set iff the NaT bit of register i is set. */unsigned longia64_get_scratch_nat_bits (struct pt_regs *pt, unsigned long scratch_unat){#	define GET_BITS(first, last, unat)						\	({										\		unsigned long bit = ia64_unat_pos(&pt->r##first);			\		unsigned long mask = ((1UL << (last - first + 1)) - 1) << first;	\		(ia64_rotl(unat, first) >> bit) & mask;					\	})	unsigned long val;	val  = GET_BITS( 1,  3, scratch_unat);	val |= GET_BITS(12, 15, scratch_unat);	val |= GET_BITS( 8, 11, scratch_unat);	val |= GET_BITS(16, 31, scratch_unat);	return val;#	undef GET_BITS}/* * Set the NaT bits for the scratch registers according to NAT and * return the resulting unat (assuming the scratch registers are * stored in PT). */unsigned longia64_put_scratch_nat_bits (struct pt_regs *pt, unsigned long nat){	unsigned long scratch_unat;#	define PUT_BITS(first, last, nat)					\	({									\		unsigned long bit = ia64_unat_pos(&pt->r##first);		\		unsigned long mask = ((1UL << (last - first + 1)) - 1) << bit;	\		(ia64_rotr(nat, first) << bit) & mask;				\	})	scratch_unat  = PUT_BITS( 1,  3, nat);	scratch_unat |= PUT_BITS(12, 15, nat);	scratch_unat |= PUT_BITS( 8, 11, nat);	scratch_unat |= PUT_BITS(16, 31, nat);	return scratch_unat;#	undef PUT_BITS}#else /* !CONFIG_IA64_NEW_UNWIND *//* * Collect the NaT bits for r1-r31 from sw->caller_unat and * sw->ar_unat and return a NaT bitset where bit i is set iff the NaT * bit of register i is set. */longia64_get_nat_bits (struct pt_regs *pt, struct switch_stack *sw){#	define GET_BITS(str, first, last, unat)						\	({										\		unsigned long bit = ia64_unat_pos(&str->r##first);			\		unsigned long mask = ((1UL << (last - first + 1)) - 1) << first;	\		(ia64_rotl(unat, first) >> bit) & mask;					\	})	unsigned long val;	val  = GET_BITS(pt,  1,  3, sw->caller_unat);	val |= GET_BITS(pt, 12, 15, sw->caller_unat);	val |= GET_BITS(pt,  8, 11, sw->caller_unat);	val |= GET_BITS(pt, 16, 31, sw->caller_unat);	val |= GET_BITS(sw,  4,  7, sw->ar_unat);	return val;#	undef GET_BITS}/* * Store the NaT bitset NAT in pt->caller_unat and sw->ar_unat. */voidia64_put_nat_bits (struct pt_regs *pt, struct switch_stack *sw, unsigned long nat){#	define PUT_BITS(str, first, last, nat)					\	({									\		unsigned long bit = ia64_unat_pos(&str->r##first);		\		unsigned long mask = ((1UL << (last - first + 1)) - 1) << bit;	\		(ia64_rotr(nat, first) << bit) & mask;				\	})	sw->caller_unat  = PUT_BITS(pt,  1,  3, nat);	sw->caller_unat |= PUT_BITS(pt, 12, 15, nat);	sw->caller_unat |= PUT_BITS(pt,  8, 11, nat);	sw->caller_unat |= PUT_BITS(pt, 16, 31, nat);	sw->ar_unat      = PUT_BITS(sw,  4,  7, nat);#	undef PUT_BITS}#endif /* !CONFIG_IA64_NEW_UNWIND */#define IA64_MLX_TEMPLATE	0x2#define IA64_MOVL_OPCODE	6voidia64_increment_ip (struct pt_regs *regs){	unsigned long w0, ri = ia64_psr(regs)->ri + 1;	if (ri > 2) {		ri = 0;		regs->cr_iip += 16;	} else if (ri == 2) {		get_user(w0, (char *) regs->cr_iip + 0);		if (((w0 >> 1) & 0xf) == IA64_MLX_TEMPLATE) {			/*			 * rfi'ing to slot 2 of an MLX bundle causes			 * an illegal operation fault.  We don't want			 * that to happen...			 */			ri = 0;			regs->cr_iip += 16;		}	}	ia64_psr(regs)->ri = ri;}voidia64_decrement_ip (struct pt_regs *regs){	unsigned long w0, ri = ia64_psr(regs)->ri - 1;	if (ia64_psr(regs)->ri == 0) {		regs->cr_iip -= 16;		ri = 2;		get_user(w0, (char *) regs->cr_iip + 0);		if (((w0 >> 1) & 0xf) == IA64_MLX_TEMPLATE) {			/*			 * rfi'ing to slot 2 of an MLX bundle causes			 * an illegal operation fault.  We don't want			 * that to happen...			 */			ri = 1;		}	}	ia64_psr(regs)->ri = ri;}/* * This routine is used to read an rnat bits that are stored on the * kernel backing store.  Since, in general, the alignment of the user * and kernel are different, this is not completely trivial.  In * essence, we need to construct the user RNAT based on up to two * kernel RNAT values and/or the RNAT value saved in the child's * pt_regs. * * user rbs * * +--------+ <-- lowest address * | slot62 | * +--------+ * |  rnat  | 0x....1f8 * +--------+ * | slot00 | \ * +--------+ | * | slot01 | > child_regs->ar_rnat * +--------+ | * | slot02 | /				kernel rbs * +--------+ 				+--------+ *	    <- child_regs->ar_bspstore	| slot61 | <-- krbs * +- - - - +				+--------+ *					| slot62 | * +- - - - +				+--------+ *					|  rnat	 | * +- - - - +				+--------+ *   vrnat				| slot00 | * +- - - - +				+--------+ *					=	 = *					+--------+ *					| slot00 | \ *					+--------+ | *					| slot01 | > child_stack->ar_rnat *					+--------+ | *					| slot02 | / *					+--------+ *						  <--- child_stack->ar_bspstore * * The way to think of this code is as follows: bit 0 in the user rnat * corresponds to some bit N (0 <= N <= 62) in one of the kernel rnat * value.  The kernel rnat value holding this bit is stored in * variable rnat0.  rnat1 is loaded with the kernel rnat value that * form the upper bits of the user rnat value. * * Boundary cases: * * o when reading the rnat "below" the first rnat slot on the kernel *   backing store, rnat0/rnat1 are set to 0 and the low order bits *   are merged in from pt->ar_rnat. * * o when reading the rnat "above" the last rnat slot on the kernel *   backing store, rnat0/rnat1 gets its value from sw->ar_rnat. */static unsigned longget_rnat (struct pt_regs *pt, struct switch_stack *sw,	  unsigned long *krbs, unsigned long *urnat_addr){	unsigned long rnat0 = 0, rnat1 = 0, urnat = 0, *slot0_kaddr, kmask = ~0UL;	unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift;	long num_regs;	kbsp = (unsigned long *) sw->ar_bspstore;	ubspstore = (unsigned long *) pt->ar_bspstore;	/*	 * First, figure out which bit number slot 0 in user-land maps	 * to in the kernel rnat.  Do this by figuring out how many	 * register slots we're beyond the user's backingstore and	 * then computing the equivalent address in kernel space.	 */	num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1);	slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs);	shift = ia64_rse_slot_num(slot0_kaddr);	rnat1_kaddr = ia64_rse_rnat_addr(slot0_kaddr);	rnat0_kaddr = rnat1_kaddr - 64;	if (ubspstore + 63 > urnat_addr) {		/* some bits need to be merged in from pt->ar_rnat */		kmask = ~((1UL << ia64_rse_slot_num(ubspstore)) - 1);		urnat = (pt->ar_rnat & ~kmask);	} 	if (rnat0_kaddr >= kbsp) {		rnat0 = sw->ar_rnat;	} else if (rnat0_kaddr > krbs) {		rnat0 = *rnat0_kaddr;	}	if (rnat1_kaddr >= kbsp) {		rnat1 = sw->ar_rnat;	} else if (rnat1_kaddr > krbs) {		rnat1 = *rnat1_kaddr;	}	urnat |= ((rnat1 << (63 - shift)) | (rnat0 >> shift)) & kmask;	return urnat;}/* * The reverse of get_rnat. */static voidput_rnat (struct pt_regs *pt, struct switch_stack *sw,	  unsigned long *krbs, unsigned long *urnat_addr, unsigned long urnat){	unsigned long rnat0 = 0, rnat1 = 0, rnat = 0, *slot0_kaddr, kmask = ~0UL, mask;	unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift;	long num_regs;	kbsp = (unsigned long *) sw->ar_bspstore;	ubspstore = (unsigned long *) pt->ar_bspstore;	/*	 * First, figure out which bit number slot 0 in user-land maps	 * to in the kernel rnat.  Do this by figuring out how many	 * register slots we're beyond the user's backingstore and	 * then computing the equivalent address in kernel space.	 */	num_regs = (long) ia64_rse_num_regs(ubspstore, urnat_addr + 1);	slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs);	shift = ia64_rse_slot_num(slot0_kaddr);	rnat1_kaddr = ia64_rse_rnat_addr(slot0_kaddr);	rnat0_kaddr = rnat1_kaddr - 64;	if (ubspstore + 63 > urnat_addr) {		/* some bits need to be place in pt->ar_rnat: */		kmask = ~((1UL << ia64_rse_slot_num(ubspstore)) - 1);		pt->ar_rnat = (pt->ar_rnat & kmask) | (rnat & ~kmask);	} 	/*	 * Note: Section 11.1 of the EAS guarantees that bit 63 of an	 * rnat slot is ignored. so we don't have to clear it here.	 */	rnat0 = (urnat << shift);	mask = ~0UL << shift;	if (rnat0_kaddr >= kbsp) {		sw->ar_rnat = (sw->ar_rnat & ~mask) | (rnat0 & mask);	} else if (rnat0_kaddr > krbs) {		*rnat0_kaddr = ((*rnat0_kaddr & ~mask) | (rnat0 & mask));	}	rnat1 = (urnat >> (63 - shift));	mask = ~0UL >> (63 - shift);	if (rnat1_kaddr >= kbsp) {		sw->ar_rnat = (sw->ar_rnat & ~mask) | (rnat1 & mask);	} else if (rnat1_kaddr > krbs) {		*rnat1_kaddr = ((*rnat1_kaddr & ~mask) | (rnat1 & mask));	}}longia64_peek (struct pt_regs *regs, struct task_struct *child, unsigned long addr, long *val){	unsigned long *bspstore, *krbs, krbs_num_regs, regnum, *rbs_end, *laddr;	struct switch_stack *child_stack;	struct pt_regs *child_regs;	size_t copied;	long ret;	laddr = (unsigned long *) addr;	child_regs = ia64_task_regs(child);#ifdef CONFIG_IA64_NEW_UNWIND	child_stack = (struct switch_stack *) (child->thread.ksp + 16);#else	child_stack = (struct switch_stack *) child_regs - 1;#endif	bspstore = (unsigned long *) child_regs->ar_bspstore;	krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;	krbs_num_regs = ia64_rse_num_regs(krbs, (unsigned long *) child_stack->ar_bspstore);	rbs_end = ia64_rse_skip_regs(bspstore, krbs_num_regs);	if (laddr >= bspstore && laddr <= ia64_rse_rnat_addr(rbs_end)) {		/*		 * Attempt to read the RBS in an area that's actually		 * on the kernel RBS => read the corresponding bits in		 * the kernel RBS.		 */		if (ia64_rse_is_rnat_slot(laddr))			ret = get_rnat(child_regs, child_stack, krbs, laddr);		else {			regnum = ia64_rse_num_regs(bspstore, laddr);			laddr = ia64_rse_skip_regs(krbs, regnum);			if (regnum >= krbs_num_regs) {				ret = 0;			} else {				if  ((unsigned long) laddr >= (unsigned long) high_memory) {					printk("yikes: trying to access long at %p\n",					       (void *) laddr);					return -EIO;				}				ret = *laddr;			}		}	} else {		copied = access_process_vm(child, addr, &ret, sizeof(ret), 0);		if (copied != sizeof(ret))			return -EIO;	}	*val = ret;	return 0;}longia64_poke (struct pt_regs *regs, struct task_struct *child, unsigned long addr, long val){	unsigned long *bspstore, *krbs, krbs_num_regs, regnum, *rbs_end, *laddr;	struct switch_stack *child_stack;	struct pt_regs *child_regs;	laddr = (unsigned long *) addr;	child_regs = ia64_task_regs(child);#ifdef CONFIG_IA64_NEW_UNWIND	child_stack = (struct switch_stack *) (child->thread.ksp + 16);#else	child_stack = (struct switch_stack *) child_regs - 1;#endif	bspstore = (unsigned long *) child_regs->ar_bspstore;	krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;	krbs_num_regs = ia64_rse_num_regs(krbs, (unsigned long *) child_stack->ar_bspstore);	rbs_end = ia64_rse_skip_regs(bspstore, krbs_num_regs);	if (laddr >= bspstore && laddr <= ia64_rse_rnat_addr(rbs_end)) {		/*		 * Attempt to write the RBS in an area that's actually		 * on the kernel RBS => write the corresponding bits		 * in the kernel RBS.		 */		if (ia64_rse_is_rnat_slot(laddr))			put_rnat(child_regs, child_stack, krbs, laddr, val);		else {

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