📄 pwm.rpt
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| | | | | | | +------------- LC95 |protect:U3|counter2
| | | | | | | | +----------- LC90 |protect:U3|clk
| | | | | | | | | +--------- LC85 |protect:U3|q1
| | | | | | | | | | +------- LC94 |protect:U3|q0
| | | | | | | | | | | +----- LC81 |protect:U3|:126
| | | | | | | | | | | | +--- LC82 ~258~1
| | | | | | | | | | | | | +- LC86 ~312~1
| | | | | | | | | | | | | |
| | | | | | | | | | | | | | Other LABs fed by signals
| | | | | | | | | | | | | | that feed LAB 'F'
LC | | | | | | | | | | | | | | | A B C D E F G H | Logic cells that feed LAB 'F':
LC89 -> - - - - - - - - - - - * - - | - - - - - * - - | <-- |protect:U3|lpm_add_sub:130|addcore:adder|addcore:adder0|result_node2
LC93 -> - - - - - - * * - - - - - - | - - - - * * - - | <-- |protect:U3|counter3
LC95 -> - - - - - - * * - - - - - - | - - - - * * - - | <-- |protect:U3|counter2
LC90 -> - - - - - - - - - * * - - - | - - - - - * - - | <-- |protect:U3|clk
LC85 -> - - - - - - - - - - - * - - | - - - - - * - - | <-- |protect:U3|q1
LC94 -> - - - - - * - - - * - * - - | - - - - - * - - | <-- |protect:U3|q0
Pin
87 -> - - - - - - - - - - - - - - | - - - - - - - - | <-- clock
96 -> - - - - - - - - - - * - - - | - - - - - * - - | <-- curr_in
1 -> - - - - - - - - - - - - * * | - - - - - * - - | <-- data_in0
2 -> - - - - - - - - - - - - * * | - - - - - * - - | <-- data_in1
5 -> - - - - - - - - - - - - * * | - - - - - * - - | <-- data_in2
6 -> - - - - - - - - - - - - * * | - - - - - * - - | <-- data_in3
7 -> - - - - - - - - - - - - * * | - - - - - * - - | <-- data_in4
97 -> - - - - - - - - - - - * - - | - - - - - * - - | <-- heat_in
98 -> - - - - - - - - - - - * - - | - - - - - * - - | <-- vol_in
LC74 -> - - - - - - * * - - - - - - | - - - - * * - - | <-- |protect:U3|counter1
LC65 -> - - - - - - * * - - - - - - | - - - - * * - - | <-- |protect:U3|counter0
LC75 -> - - - - - - - - * - - - - - | - - - - - * - - | <-- |protect:U3|divi_cp
LC100-> - - - - - - - - - - - - * - | - - - - - * * * | <-- counter24
LC99 -> - - - - - - - - - - - - * - | - - - - - * * * | <-- counter23
LC97 -> - - - - - - - - - - - - * - | - - - - - * * * | <-- counter22
LC101-> * - - - - - - - - - - - * - | - - - - - * * * | <-- counter21
LC113-> * - - - - - - - - - - - * - | - - - - - * * * | <-- counter20
LC123-> - - - - * - - - - - - - - - | - - - - * * - * | <-- counter15
LC114-> - - - * * - - - - - - - - * | - - - - - * - * | <-- counter14
LC115-> - - * * * - - - - - - - - * | - - - - - * - * | <-- counter13
LC116-> - * * * * - - - - - - - - * | - - - - - * - * | <-- counter12
LC117-> - * * * * - - - - - - - - * | - - - - - * - * | <-- counter11
LC119-> - * * * * - - - - - - - - * | - - - - - * - * | <-- counter10
* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).
Device-Specific Information:c:\software\project_beijing\epm7064\cpld_v1.2\pwm_verilog hdl_v1.1\pwm.rpt
pwm
** LOGIC CELL INTERCONNECTIONS **
Logic Array Block 'G':
Logic cells placed in LAB 'G'
+------------------------------- LC103 |filter:U1|q0
| +----------------------------- LC110 |lpm_add_sub:346|addcore:adder|addcore:adder0|result_node2
| | +--------------------------- LC102 |lpm_add_sub:346|addcore:adder|addcore:adder0|result_node3
| | | +------------------------- LC112 |lpm_add_sub:346|addcore:adder|addcore:adder0|result_node4
| | | | +----------------------- LC111 |lpm_add_sub:346|addcore:adder|addcore:adder0|result_node5
| | | | | +--------------------- LC106 counter28
| | | | | | +------------------- LC105 counter27
| | | | | | | +----------------- LC104 counter26
| | | | | | | | +--------------- LC98 counter25
| | | | | | | | | +------------- LC100 counter24
| | | | | | | | | | +----------- LC99 counter23
| | | | | | | | | | | +--------- LC97 counter22
| | | | | | | | | | | | +------- LC101 counter21
| | | | | | | | | | | | | +----- LC107 ~245~1
| | | | | | | | | | | | | | +--- LC109 ~257~1
| | | | | | | | | | | | | | | +- LC108 ~291~1
| | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | Other LABs fed by signals
| | | | | | | | | | | | | | | | that feed LAB 'G'
LC | | | | | | | | | | | | | | | | | A B C D E F G H | Logic cells that feed LAB 'G':
LC110-> - - - - - - - - - - - * - - - - | - - - - - - * - | <-- |lpm_add_sub:346|addcore:adder|addcore:adder0|result_node2
LC102-> - - - - - - - - - - * - - - - - | - - - - - - * - | <-- |lpm_add_sub:346|addcore:adder|addcore:adder0|result_node3
LC112-> - - - - - - - - - * - - - - - - | - - - - - - * - | <-- |lpm_add_sub:346|addcore:adder|addcore:adder0|result_node4
LC111-> - - - - - - - - * - - - - - - - | - - - - - - * - | <-- |lpm_add_sub:346|addcore:adder|addcore:adder0|result_node5
LC106-> * - - - - * * * * * * * * - - * | - - - - - - * * | <-- counter28
LC105-> * - - - - * * * * * * * * * - * | - - - - - - * * | <-- counter27
LC104-> - - - - - * * * * * * * * * - - | - - - - - - * * | <-- counter26
LC98 -> - - - - * * * * * * * * * * * - | - - - - - - * * | <-- counter25
LC100-> - - - * * * * * * * * * * - - - | - - - - - * * * | <-- counter24
LC99 -> - - * * * * * * * * * * * - - - | - - - - - * * * | <-- counter23
LC97 -> - * * * * * * * * * * * * - - - | - - - - - * * * | <-- counter22
LC101-> - * * * * * * * * * * * * - - - | - - - - - * * * | <-- counter21
LC107-> * - - - - - - - - - - - - - - * | - - - - - - * - | <-- ~245~1
LC109-> - - - - - - - - - - - - - * - - | - - - - - - * - | <-- ~257~1
LC108-> * - - - - - - - - - - - - - - * | - - - - - - * - | <-- ~291~1
Pin
87 -> - - - - - - - - - - - - - - - - | - - - - - - - - | <-- clock
8 -> - - - - - - - - - - - - - * * - | - - - - * - * - | <-- data_in5
9 -> - - - - - - - - - - - - - * - - | - - - - * - * - | <-- data_in6
10 -> * - - - - - - - - - - - - * - * | - - - - * - * - | <-- data_in7
LC83 -> - - - - - - - - - - - - * - - - | - - - - - - * - | <-- |lpm_add_sub:346|addcore:adder|addcore:adder0|result_node1
LC125-> - - - - - - - * - - - - - - - - | - - - - - - * - | <-- |lpm_add_sub:346|addcore:adder|addcore:adder0|result_node6
LC118-> - - - - - - * - - - - - - - - - | - - - - - - * - | <-- |lpm_add_sub:346|addcore:adder|addcore:adder0|result_node7
LC128-> - - - - - * - - - - - - - - - - | - - - - - - * - | <-- |lpm_add_sub:346|addcore:adder|addcore:adder1|result_node0
LC81 -> * - - - - - - - - - - - - - - * | - - - - * - * - | <-- |protect:U3|:126
LC113-> - * * * * * * * * * * * * - - - | - - - - - * * * | <-- counter20
LC121-> * - - - - * * * * * * * * - - * | - - - - * - * * | <-- flag
LC82 -> - - - - - - - - - - - - - * - - | - - - - - - * - | <-- ~258~1
* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).
Device-Specific Information:c:\software\project_beijing\epm7064\cpld_v1.2\pwm_verilog hdl_v1.1\pwm.rpt
pwm
** LOGIC CELL INTERCONNECTIONS **
Logic Array Block 'H':
Logic cells placed in LAB 'H'
+------------------------------- LC125 |lpm_add_sub:346|addcore:adder|addcore:adder0|result_node6
| +----------------------------- LC118 |lpm_add_sub:346|addcore:adder|addcore:adder0|result_node7
| | +--------------------------- LC128 |lpm_add_sub:346|addcore:adder|addcore:adder1|result_node0
| | | +------------------------- LC126 |lpm_add_sub:347|addcore:adder|addcore:adder0|result_node6
| | | | +----------------------- LC127 |lpm_add_sub:347|addcore:adder|addcore:adder0|result_node7
| | | | | +--------------------- LC113 counter20
| | | | | | +------------------- LC124 counter18
| | | | | | | +----------------- LC122 counter17
| | | | | | | | +--------------- LC120 counter16
| | | | | | | | | +------------- LC123 counter15
| | | | | | | | | | +----------- LC114 counter14
| | | | | | | | | | | +--------- LC115 counter13
| | | | | | | | | | | | +------- LC116 counter12
| | | | | | | | | | | | | +----- LC117 counter11
| | | | | | | | | | | | | | +--- LC119 counter10
| | | | | | | | | | | | | | | +- LC121 flag
| | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | Other LABs fed by signals
| | | | | | | | | | | | | | | | that feed LAB 'H'
LC | | | | | | | | | | | | | | | | | A B C D E F G H | Logic cells that feed LAB 'H':
LC126-> - - - - - - - - * - - - - - - - | - - - - - - - * | <-- |lpm_add_sub:347|addcore:adder|addcore:adder0|result_node6
LC127-> - - - - - - - * - - - - - - - - | - - - - - - - * | <-- |lpm_add_sub:347|addcore:adder|addcore:adder0|result_node7
LC113-> * * * - - * - - - - - - - - - * | - - - - - * * * | <-- counter20
LC124-> - - - - - - * * * * * * * * * * | - - - - * - - * | <-- counter18
LC122-> - - - - * - * * * * * * * * * * | - - - - * - - * | <-- counter17
LC120-> - - - * * - * * * * * * * * * * | - - - - * - - * | <-- counter16
LC123-> - - - * * - * * * * * * * * * * | - - - - * * - * | <-- counter15
LC114-> - - - * * - * * * * * * * * * * | - - - - - * - * | <-- counter14
LC115-> - - - * * - * * * * * * * * * * | - - - - - * - * | <-- counter13
LC116-> - - - * * - * * * * * * * * * * | - - - - - * - * | <-- counter12
LC117-> - - - * * - * * * * * * * * - * | - - - - - * - * | <-- counter11
LC119-> - - - * * - * * * * * * * * * * | - - - - - * - * | <-- counter10
LC121-> - - - - - * * * * * * * * * * * | - - - - * - * * | <-- flag
Pin
87 -> - - - - - - - - - - - - - - - - | - - - - - - - - | <-- clock
LC96 -> - - - - - - - - - - - - * - - - | - - - - - - - * | <-- |lpm_add_sub:347|addcore:adder|addcore:adder0|result_node2
LC92 -> - - - - - - - - - - - * - - - - | - - - - - - - * | <-- |lpm_add_sub:347|addcore:adder|addcore:adder0|result_node3
LC91 -> - - - - - - - - - - * - - - - - | - - - - - - - * | <-- |lpm_add_sub:347|addcore:adder|addcore:adder0|result_node4
LC87 -> - - - - - - - - - * - - - - - - | - - - - - - - * | <-- |lpm_add_sub:347|addcore:adder|addcore:adder0|result_node5
LC106-> - - * - - * - - - - - - - - - * | - - - - - - * * | <-- counter28
LC105-> - * * - - * - - - - - - - - - * | - - - - - - * * | <-- counter27
LC104-> * * * - - * - - - - - - - - - * | - - - - - - * * | <-- counter26
LC98 -> * * * - - * - - - - - - - - - * | - - - - - - * * | <-- counter25
LC100-> * * * - - * - - - - - - - - - * | - - - - - * * * | <-- counter24
LC99 -> * * * - - * - - - - - - - - - * | - - - - - * * * | <-- counter23
LC97 -> * * * - - * - - - - - - - - - * | - - - - - * * * | <-- counter22
LC101-> * * * - - - - - - - - - - - - * | - - - - - * * * | <-- counter21
* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).
Device-Specific Information:c:\software\project_beijing\epm7064\cpld_v1.2\pwm_verilog hdl_v1.1\pwm.rpt
pwm
** EQUATIONS **
clock : INPUT;
curr_in : INPUT;
data_in0 : INPUT;
data_in1 : INPUT;
data_in2 : INPUT;
data_in3 : INPUT;
data_in4 : INPUT;
data_in5 : INPUT;
data_in6 : INPUT;
data_in7 : INPUT;
heat_in : INPUT;
vol_in : INPUT;
-- Node name is ':226' = 'counter10'
-- Equation name is 'counter10', location is LC119, type is buried.
counter10 = DFFE( _EQ001 $ !flag, GLOBAL( clock), VCC, VCC, VCC);
_EQ001 = !counter10 & counter12 & counter13 & counter14 & counter15 &
counter18 & !flag
# !counter10 & counter16 & counter18 & !flag
# !counter10 & counter17 & counter18 & !flag
# counter10;
-- Node name is ':225' = 'counter11'
-- Equation name is 'counter11', location is LC117, type is buried.
counter11 = DFFE( _EQ002 $ GND, GLOBAL( clock), VCC, VCC, VCC);
_EQ002 = counter10 & !counter11 & !counter16 & !counter17 & !flag & _X001
# !counter10 & counter11 & !counter16 & !counter17 & _X001
# counter10 & !counter11 & !counter18 & !flag
# !counter10 & counter11 & !counter18
# counter11 & flag;
_X001 = EXP( counter12 & counter13 & counter14 & counter15);
-- Node name is ':224' = 'counter12'
-- Equation name is 'counter12', location is LC116, type is buried.
counter12 = DFFE( _EQ003 $ VCC, GLOBAL( clock), VCC, VCC, VCC);
_EQ003 = counter10 & counter11 & !counter12 & counter13 & counter14 &
counter15 & counter18
# counter12 & counter13 & counter14 & counter15 & counter18 &
!flag
# counter18 & !flag & _X002
# !counter12 & flag
# !flag & !_LC096;
_X002 = EXP(!counter16 & !counter17);
-- Node name is ':223' = 'counter13'
-- Equation name is 'counter13', location is LC115, type is buried.
counter13 = DFFE( _EQ004 $ VCC, GLOBAL( clock), VCC, VCC, VCC);
_EQ004 = counter10 & counter11 & counter13 & counter14 & counter15 &
counter18 & !flag
# counter12 & counter13 & counter14 & counter15 & counter18 &
!flag
# counter18 & !flag & _X002
# !counter13 & flag
# !flag & !_LC092;
_X002 = EXP(!counter16 & !counter17);
-- Node name is ':222' = 'counter14'
-- Equation name is 'counter14', location is LC114, type is buried.
counter14 = DFFE( _EQ005 $ VCC, GLOBAL( clock), VCC, VCC, VCC);
_EQ005 = counter10 & counter11 & counter13 & counter14 & counter15 &
counter18 & !flag
# counter12 & counter13 & counter14 & counter15 & counter18 &
!flag
# counter18 & !flag & _X002
# !counter14 & flag
# !flag & !_LC091;
_X002 = EXP(!counter16 & !counter17);
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