manual.ps

来自「ERC32 经典的sparc v7 cpu」· PS 代码 · 共 2,647 行 · 第 1/5 页

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(Version 1.0) 486.64 591.95 T
(October 1996) 475.96 579.95 T
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(ERC32 VHDL models user\325) 45.65 619.95 T
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(Jiri Gaisler) 45.65 177.62 T
(European Space Research and Technology Centre \050ESA/ESTEC\051) 45.65 161.62 T
45.65 154.95 549.65 154.95 2 L
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(Copyright 1996 European Space Agency) 50.15 254.62 T
-0.76 (Permission is granted to make and distribute verbatim copies of this manual provided the copyright) 50.15 233.62 P
(notice and this permission notice are preserved on all copies.) 50.15 220.62 T
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-0.12 (for verbatim copying, provided also that the entire resulting derived work) 50.15 186.62 P
-0.12 (is distributed under the) 426.28 186.62 P
(terms of a permission notice identical to this one.) 50.15 173.62 T
-0.41 (Permission is granted to copy and distribute translations of this manual into another language, un-) 50.15 152.62 P
(der the above conditions for modified versions.) 50.15 139.62 T
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(Introduction) 45.65 773.62 T
(3) 543.53 773.62 T
1 14 Q
(1 Introduction) 41.15 735.62 T
0 11 Q
-0.32 (This document describes the ERC32 VHDL models) 41.15 713.62 P
-0.32 (. Discussions are provided for the following topics:) 297.67 713.62 P
(\245 contents and directory structure of the models) 59.15 692.62 T
(\245 installation and compilation) 59.15 675.62 T
(\245 usage of the models) 59.15 658.62 T
(\245 discrepancies between the models and the real devices) 59.15 641.62 T
(\245 technical support) 59.15 624.62 T
-0.39 (The ERC32 VHDL models consists of fully functional, timing accurate VHDL models of the TSC691E) 41.15 584.62 P
-0.5 (integer unit, TSC692E \337oating-point unit and TSC693E memory controller) 41.15 571.62 P
-0.5 (. These models are intend-) 417.4 571.62 P
-0.31 (ed to be used in board level simulation and veri\336cation of ERC32-based systems) 41.15 558.62 P
-0.31 (. Due to the complex-) 443.55 558.62 P
0.42 (ity of the models) 41.15 545.62 P
0.42 (, they are to typically too slow to be used for softw) 126.27 545.62 P
0.42 (are validation; it is better to use) 383.92 545.62 P
(simulators like SIS or erc32sim for this task.) 41.15 532.62 T
0.54 (The models are distributed under GNU library general public license \050GLGPL\051. Brie\337y) 41.15 511.62 P
0.54 (, this means) 486.62 511.62 P
0.97 (that anyone ma) 41.15 498.62 P
0.97 (y use the models in any w) 122.84 498.62 P
0.97 (a) 259.65 498.62 P
0.97 (y he might see \336t, but modi\336cation and re-distribution) 265.66 498.62 P
0.27 (must be performed according to the GLGPL. The complete license agreement is provided in the dis-) 41.15 485.62 P
-0.29 (tribution in \336le COPYING) 41.15 472.62 P
-0.29 (.LIB) 173.91 472.62 P
-0.29 (. The users are especially asked to take notice of paragraph 15 and 16:) 196.32 472.62 P
-0.59 (15. BEC) 41.15 430.62 P
-0.59 (A) 82.54 430.62 P
-0.59 (USE THE LIBRARY IS LICENSED FREE OF CHARGE, THERE IS NO W) 90.15 430.62 P
-0.59 (ARRANTY FOR) 467.53 430.62 P
-0.35 (THE LIBRARY) 41.15 417.62 P
-0.35 (, T) 118.52 417.62 P
-0.35 (O THE EXTENT PERMITTED BY APPLIC) 131.73 417.62 P
-0.35 (ABLE LA) 352.64 417.62 P
-0.35 (W) 401.24 417.62 P
-0.35 (. EXCEPT WHEN O) 410.65 417.62 P
-0.35 (THER-) 513.6 417.62 P
-0.17 (WISE ST) 41.15 404.62 P
-0.17 (A) 88.24 404.62 P
-0.17 (TED IN WRITING THE COPYRIGHT HOLDERS AND/OR O) 95.99 404.62 P
-0.17 (THER P) 409.63 404.62 P
-0.17 (ARTIES PRO) 451.63 404.62 P
-0.17 (VIDE) 520.73 404.62 P
1.37 (THE LIBRARY \322) 41.15 391.62 P
1.37 (AS IS\323 WITHOUT W) 129.24 391.62 P
1.37 (ARRANTY OF ANY KIND) 239.96 391.62 P
1.37 (, EITHER EXPRESSED OR IM-) 379.77 391.62 P
0.28 (PLIED) 41.15 378.62 P
0.28 (, INCLUDING) 76.39 378.62 P
0.28 (, BUT NO) 150.63 378.62 P
0.28 (T LIMITED T) 202.24 378.62 P
0.28 (O) 274.21 378.62 P
0.28 (, THE IMPLIED W) 282.36 378.62 P
0.28 (ARRANTIES OF MERCHANT) 380.63 378.62 P
0.28 (A-) 538.04 378.62 P
3.37 (BILITY AND FITNESS FOR A P) 41.15 365.62 P
3.37 (ARTICULAR PURPOSE. THE ENTIRE RISK AS T) 226.49 365.62 P
3.37 (O THE) 510.22 365.62 P
1.82 (QU) 41.15 352.62 P
1.82 (ALITY AND PERFORMANCE OF THE LIBRARY IS WITH Y) 58.34 352.62 P
1.82 (OU) 390.26 352.62 P
1.82 (. SHOULD THE LIBRARY) 406.68 352.62 P
-0.05 (PRO) 41.15 339.62 P
-0.05 (VE DEFECTIVE, Y) 64.79 339.62 P
-0.05 (OU ASSUME THE COST OF ALL NECESSARY SERVICING) 164.7 339.62 P
-0.05 (, REP) 481.11 339.62 P
-0.05 (AIR OR) 509.78 339.62 P
(CORRECTION) 41.15 326.62 T
(.) 118.15 326.62 T
0.85 (16. IN NO EVENT UNLESS REQUIRED BY APPLIC) 41.15 305.62 P
0.85 (ABLE LA) 322.14 305.62 P
0.85 (W OR AGREED T) 371.94 305.62 P
0.85 (O IN WRITING) 467.29 305.62 P
0.86 (WILL ANY COPYRIGHT HOLDER, OR ANY O) 41.15 292.62 P
0.86 (THER P) 290.68 292.62 P
0.86 (ARTY WHO MA) 333.71 292.62 P
0.86 (Y MODIFY AND/OR RE-) 418.52 292.62 P
-0.41 (DISTRIBUTE THE LIBRARY AS PERMITTED ABO) 41.15 279.62 P
-0.41 (VE, BE LIABLE T) 310.41 279.62 P
-0.41 (O Y) 403.6 279.62 P
-0.41 (OU FOR DAMAGES) 422.34 279.62 P
-0.41 (, IN-) 526.84 279.62 P
6.38 (CLUDING ANY GENERAL, SPECIAL, INCIDENT) 41.15 266.62 P
6.38 (AL OR CONSEQUENTIAL DAMAGES) 329.45 266.62 P
1.27 (ARISING OUT OF THE USE OR INABILITY T) 41.15 253.62 P
1.27 (O USE THE LIBRARY \050INCLUDING BUT NO) 294.4 253.62 P
1.27 (T) 542.31 253.62 P
0.99 (LIMITED T) 41.15 240.62 P
0.99 (O LOSS OF DA) 103.15 240.62 P
0.99 (T) 185.81 240.62 P
0.99 (A OR DA) 192.95 240.62 P
0.99 (T) 241.79 240.62 P
0.99 (A BEING RENDERED INACCURA) 248.93 240.62 P
0.99 (TE OR LOSSES SUS-) 434.61 240.62 P
0.47 (T) 41.15 227.62 P
0.47 (AINED BY Y) 48.29 227.62 P
0.47 (OU OR THIRD P) 116.46 227.62 P
0.47 (ARTIES OR A F) 205.27 227.62 P
0.47 (AILURE OF THE LIBRARY T) 289.65 227.62 P
0.47 (O OPERA) 447.47 227.62 P
0.47 (TE WITH) 499.07 227.62 P
0.32 (ANY O) 41.15 214.62 P
0.32 (THER SOFTW) 77.84 214.62 P
0.32 (ARE\051, EVEN IF SUCH HOLDER OR O) 154.01 214.62 P
0.32 (THER P) 357.08 214.62 P
0.32 (ARTY HAS BEEN AD) 399.58 214.62 P
0.32 (VISED) 513.8 214.62 P
(OF THE POSSIBILITY OF SUCH DAMAGES) 41.15 201.62 T
(.) 277.07 201.62 T
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(ERC32 VHDL models) 438.82 773.62 T
45.65 101.45 549.65 744.95 R
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(2 Installation and directory structure) 41.15 735.62 T
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(2.1 Obtaining ERC32 VHDL models) 41.15 706.95 T
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-0.17 (The ERC32 models are only a) 41.15 687.62 P
-0.17 (vailable via anonymous ftp) 190.93 687.62 P
-0.17 (. The primary home of the models is the ES-) 327.33 687.62 P
-0.61 (TEC ftp-server at URL: ftp://ftp) 41.15 674.62 P
-0.61 (.estec) 199.02 674.62 P
-0.61 (.esa.nl/pub/ws/wsd/erc32/erc32/vhdl. The models are distributed) 227.14 674.62 P
(in an compressed tar\336le;) 41.15 661.62 T
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(erc32vhdl-1.0.tar.gz) 169.29 661.62 T
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(.) 301.29 661.62 T
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(2.2 Installation) 41.15 633.95 T
4 11 Q
0.3 (After obtaining the compressed tar\336le, uncompress and untar it in a suitable location. F) 41.15 614.62 P
0.3 (ollo) 428.33 614.62 P
0.3 (wing commands can be) 445.18 614.62 P
(used on most UNIX systems:) 41.15 601.62 T
3 F
(gunzip -c erc32vhdl-1.0.tar.gz | tar xf -) 77.15 580.62 T
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-0.1 (This will create the) 41.15 559.62 P
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-0.25 (erc32vhdl) 128.1 559.62 P
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-0.1 ( directory in the current directory) 187.51 559.62 P
-0.1 (. The) 332.59 559.62 P
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-0.25 (erc32vhdl) 357.74 559.62 P
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-0.1 ( directory contains the follo) 417.14 559.62 P
-0.1 (w-) 538.04 559.62 P
(ing \336les:) 41.15 546.62 T
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(COPYING.LIB             fpurt_lib.vhd           sparc_lib.vhd) 41.15 525.62 T
(MECNom.tim              iurt_lib.vhd            stdsim.dft) 41.15 509.62 T
(board.vhd               meclibrary.vhd          synopsys_vss.setup) 41.15 493.62 T
(compile.modeltech       memory.vhd              vsystem.ini) 41.15 477.62 T
(compile.synopsys        mms.vhd                 work) 41.15 461.62 T
(factlib.vhd             prom.dat) 41.15 445.62 T
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0.79 (The models ha) 41.15 412.62 P
0.79 (ve been veri\336ed on two simulators) 116.78 412.62 P
0.79 (, modeltec) 294.21 412.62 P
0.79 (h VSIM v4.6g and synopsys VSS v3.4b) 346.26 412.62 P
0.79 (.) 546.59 412.62 P
0.15 (The \336les) 41.15 399.62 P
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0.33 (compile.modeltech) 87.9 399.62 P
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0.15 ( and) 200.1 399.62 P
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0.33 (compile.synopsys) 225.67 399.62 P
0 F
0.15 ( contains a script to compile the models for) 331.27 399.62 P
0.58 (the two simulators) 41.15 386.62 P
0.58 (. F) 137.39 386.62 P
0.58 (or other simulators) 150.82 386.62 P
0.58 (, modify these scripts according to your needs) 249.49 386.62 P
0.58 (. The models) 484.1 386.62 P
0.34 (de\336ne and make use of a number of libraries; the \336les vsystem.ini and synopsys_vss) 41.15 373.62 P
0.34 (.setup provides) 472.31 373.62 P
-0.29 (the library mapping for modeltec) 41.15 360.62 P
-0.29 (h and synopsys simulators) 207.35 360.62 P
-0.29 (. The models are divided into \336les accord-) 341.26 360.62 P
(ing to whic) 41.15 347.62 T
(h library they are called from:) 96.69 347.62 T
3 F
(mms.vhd) 41.15 326.62 T
(MMS) 185.15 326.62 T
(sparc_lib.vhd) 41.15 310.62 T
(SPARC_LIB) 185.15 310.62 T
(iurt_lib.vhd) 41.15 294.62 T
(IURT_LIB) 185.15 294.62 T
(fpurt_lib.vhd) 41.15 278.62 T
(FPURT_LIB) 185.15 278.62 T
(meclibrary.vhd) 41.15 262.62 T
(MECLIBRARY) 185.15 262.62 T
(memory.vhd) 41.15 246.62 T
(MEMORY) 185.15 246.62 T
(board.vhd) 41.15 230.62 T
(WORK) 185.15 230.62 T
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(Usage) 45.65 773.62 T
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(3 Usage) 45.65 735.62 T
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(3.1 System simulation) 45.65 706.95 T
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0.49 (F) 45.65 687.62 P
0.49 (or detailed information on how the models work, please refer to the data sheets of the individual) 52.38 687.62 P
0.23 (devices) 45.65 674.62 P
0.23 (. An example on how to use the models in system can be found in) 82.04 674.62 P
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0.5 (board.vhd) 418.24 674.62 P
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0.23 (. This \336le con-) 477.64 674.62 P
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-0.97 (prom.dat) 365.63 648.62 P
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-0.45 ( at reset time) 418.43 648.62 P
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0.21 (this system, \336rst compile all models using one of the compile scripts) 45.65 635.62 P
0.21 (. The con\336guration to simulate) 392.35 635.62 P
(is) 45.65 622.62 T
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(BOARD_CFG) 57.26 622.62 T
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(, for the modeltec) 116.26 622.62 T
(h simulator the start command would be:) 204.18 622.62 T
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(vsim board_cfg &) 81.65 580.62 T
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0.16 (The provided prom.dat contains a program that will run a number of IU and FPU instructions and) 45.65 538.62 P
-0.35 (then print \322TEST OK\323 \336ve times on the console if no errors were detected. The simulator needs to be) 45.65 525.62 P
0.05 (run for 1,511,000 ns to complete the program \050this ma) 45.65 512.62 P
0.05 (y take up to 20 minutes on some simulators\051.) 320.64 512.62 P
-0.46 (The \336le) 45.65 499.62 P
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-1 (stdsim.dft) 86.08 499.62 P
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-0.46 ( and) 152.08 499.62 P
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-1 (MECNom.tim) 176.42 499.62 P
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-0.46 ( needs to be in the simulation directory \050see below\051. Note that) 242.42 499.62 P
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0.56 (board.vhd) 167.09 486.62 P
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0.26 (aitstate during write to op-) 411.3 486.62 P
(erate correctly) 45.65 473.62 T
(.) 117.8 473.62 T
1 12 Q
(3.2 T) 45.65 445.95 T
(iming) 74.65 445.95 T
0 11 Q
0.74 (The models inc) 45.65 426.62 P
0.74 (lude timing as de\336ned in the device data sheets) 123.44 426.62 P
0.74 (. The \336le stdsim.dft can be used to) 370.69 426.62 P
-0.55 (specify different process) 45.65 413.62 P
-0.55 (, temperature) 166.48 413.62 P
-0.55 (, voltage and load conditions) 235.6 413.62 P
-0.55 (. Below is a listing of a sample std-) 377.58