sram4m.map.qmsg

Altera cyclone ep1c6对sram idt71系列的读写时序控制

{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "adr_2\[2\] sram4m.vhd(127) " "Info (10041): Inferred latch for \"adr_2\[2\]\" at sram4m.vhd(127)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 127 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "adr_2\[3\] sram4m.vhd(127) " "Info (10041): Inferred latch for \"adr_2\[3\]\" at sram4m.vhd(127)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 127 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "adr_2\[4\] sram4m.vhd(127) " "Info (10041): Inferred latch for \"adr_2\[4\]\" at sram4m.vhd(127)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 127 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "adr_2\[5\] sram4m.vhd(127) " "Info (10041): Inferred latch for \"adr_2\[5\]\" at sram4m.vhd(127)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 127 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "adr_2\[6\] sram4m.vhd(127) " "Info (10041): Inferred latch for \"adr_2\[6\]\" at sram4m.vhd(127)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 127 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "adr_2\[7\] sram4m.vhd(127) " "Info (10041): Inferred latch for \"adr_2\[7\]\" at sram4m.vhd(127)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 127 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "adr_2\[8\] sram4m.vhd(127) " "Info (10041): Inferred latch for \"adr_2\[8\]\" at sram4m.vhd(127)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 127 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "adr_2\[9\] sram4m.vhd(127) " "Info (10041): Inferred latch for \"adr_2\[9\]\" at sram4m.vhd(127)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 127 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "addr2\[0\] sram4m.vhd(127) " "Info (10041): Inferred latch for \"addr2\[0\]\" at sram4m.vhd(127)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 127 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "addr2\[1\] sram4m.vhd(127) " "Info (10041): Inferred latch for \"addr2\[1\]\" at sram4m.vhd(127)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 127 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "addr2\[2\] sram4m.vhd(127) " "Info (10041): Inferred latch for \"addr2\[2\]\" at sram4m.vhd(127)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 127 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "addr2\[3\] sram4m.vhd(127) " "Info (10041): Inferred latch for \"addr2\[3\]\" at sram4m.vhd(127)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 127 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "addr2\[4\] sram4m.vhd(127) " "Info (10041): Inferred latch for \"addr2\[4\]\" at sram4m.vhd(127)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 127 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "addr2\[5\] sram4m.vhd(127) " "Info (10041): Inferred latch for \"addr2\[5\]\" at sram4m.vhd(127)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 127 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "addr2\[6\] sram4m.vhd(127) " "Info (10041): Inferred latch for \"addr2\[6\]\" at sram4m.vhd(127)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 127 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "addr2\[7\] sram4m.vhd(127) " "Info (10041): Inferred latch for \"addr2\[7\]\" at sram4m.vhd(127)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 127 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "addr2\[8\] sram4m.vhd(127) " "Info (10041): Inferred latch for \"addr2\[8\]\" at sram4m.vhd(127)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 127 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "addr2\[9\] sram4m.vhd(127) " "Info (10041): Inferred latch for \"addr2\[9\]\" at sram4m.vhd(127)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 127 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "oe_2 sram4m.vhd(37) " "Info (10041): Inferred latch for \"oe_2\" at sram4m.vhd(37)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 37 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "dio_2\[0\] sram4m.vhd(37) " "Info (10041): Inferred latch for \"dio_2\[0\]\" at sram4m.vhd(37)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 37 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "dio_2\[1\] sram4m.vhd(37) " "Info (10041): Inferred latch for \"dio_2\[1\]\" at sram4m.vhd(37)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 37 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "dio_2\[2\] sram4m.vhd(37) " "Info (10041): Inferred latch for \"dio_2\[2\]\" at sram4m.vhd(37)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 37 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "dio_2\[3\] sram4m.vhd(37) " "Info (10041): Inferred latch for \"dio_2\[3\]\" at sram4m.vhd(37)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 37 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "dio_2\[4\] sram4m.vhd(37) " "Info (10041): Inferred latch for \"dio_2\[4\]\" at sram4m.vhd(37)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 37 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "dio_2\[5\] sram4m.vhd(37) " "Info (10041): Inferred latch for \"dio_2\[5\]\" at sram4m.vhd(37)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 37 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "dio_2\[6\] sram4m.vhd(37) " "Info (10041): Inferred latch for \"dio_2\[6\]\" at sram4m.vhd(37)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 37 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "dio_2\[7\] sram4m.vhd(37) " "Info (10041): Inferred latch for \"dio_2\[7\]\" at sram4m.vhd(37)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 37 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "we_2 sram4m.vhd(37) " "Info (10041): Inferred latch for \"we_2\" at sram4m.vhd(37)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 37 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "res2 sram4m.vhd(37) " "Info (10041): Inferred latch for \"res2\" at sram4m.vhd(37)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 37 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "cs_2 sram4m.vhd(37) " "Info (10041): Inferred latch for \"cs_2\" at sram4m.vhd(37)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 37 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "bt860_data\[0\] sram4m.vhd(37) " "Info (10041): Inferred latch for \"bt860_data\[0\]\" at sram4m.vhd(37)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 37 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "bt860_data\[1\] sram4m.vhd(37) " "Info (10041): Inferred latch for \"bt860_data\[1\]\" at sram4m.vhd(37)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 37 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "bt860_data\[2\] sram4m.vhd(37) " "Info (10041): Inferred latch for \"bt860_data\[2\]\" at sram4m.vhd(37)" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 37 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}