vgavga.pcf

xilinx fpga 做VGA驱动信号的Verilog原代码,ise版本9.2

//! **************************************************************************
// Written by: Map J.36 on Sun Jun 01 01:44:15 2008
//! **************************************************************************

SCHEMATIC START;
COMP "vga_G" LOCATE = SITE "T12" LEVEL 1;
COMP "vga_B" LOCATE = SITE "R11" LEVEL 1;
COMP "key<0>" LOCATE = SITE "M13" LEVEL 1;
COMP "vga_h_sync" LOCATE = SITE "R9" LEVEL 1;
COMP "key<1>" LOCATE = SITE "M14" LEVEL 1;
COMP "clock" LOCATE = SITE "T9" LEVEL 1;
COMP "vga_v_sync" LOCATE = SITE "T10" LEVEL 1;
COMP "vga_R" LOCATE = SITE "R12" LEVEL 1;
SCHEMATIC END;