_impact.cmd

xilinx fpga 做VGA驱动信号的Verilog原代码,ise版本9.2

setMode -bs
setMode -bs
setCable -port auto
Identify 
identifyMPM 
assignFile -p 1 -file "E:/Program Files/xp/Xilinx92i/mydesign/vgavga/vgavga.bit"
Program -p 1 -v -defaultVersion 0 
Program -p 1 -defaultVersion 0 
Program -p 1 -v -defaultVersion 0 
Program -p 1 -v -defaultVersion 0 
Program -p 1 -v -defaultVersion 0 
Program -p 1 -defaultVersion 0 
Erase -p 2 
Program -p 1 -defaultVersion 0 
Program -p 1 -defaultVersion 0 
Program -p 1 -defaultVersion 0 
assignFile -p 2 -file "E:/Program Files/xp/Xilinx92i/mydesign/vgavga/ping.mcs"
setAttribute -position 2 -attr packageName -value "(null)"
Program -p 2 -e -v -defaultVersion 0 
setCable -port auto
Program -p 1 -defaultVersion 0 
assignFile -p 2 -file "E:/last2.mcs"
setAttribute -position 2 -attr packageName -value "(null)"
setCable -port auto
Program -p 2 -e -v -defaultVersion 0 
Program -p 1 -defaultVersion 0 
setCable -port auto
Program -p 1 -defaultVersion 0 
setCable -port auto
Program -p 1 -defaultVersion 0 
setCable -port auto
Program -p 1 -defaultVersion 0 
setCable -port auto
Program -p 1 -defaultVersion 0 
Program -p 1 -defaultVersion 0 
Program -p 1 -defaultVersion 0 
setCable -port auto
Program -p 1 -defaultVersion 0 
setMode -bs
deleteDevice -position 1
deleteDevice -position 1
setMode -ss
setMode -sm
setMode -hw140
setMode -spi
setMode -acecf
setMode -acempm
setMode -pff
setMode -bs