tb_uart_rx1.vhd

UART-FPGA完全好用的程序，ISE8.2下打开

-- Testbench created online at:
--   www.doulos.com/knowhow/perl/testbench_creation/
-- Copyright Doulos Ltd
-- SD, 03 November 2002

library IEEE;
use IEEE.Std_logic_1164.all;
use IEEE.Numeric_Std.all;

entity uart_rx_tb is
end;

architecture bench of uart_rx_tb is

  component uart_rx
  	generic (
  		DBIT : integer := 8 ;
  		SB_TICK: integer := 16
  				) ;
  	port (
  		clk, reset : in std_logic;
  		rx : in std_logic;
  		s_tick: in std_logic;
  		rx_done_tick: out std_logic;
  		dout : out std_logic_vector( 7 downto 0)
  		) ;
  end component;

  signal clk, reset: std_logic;
  signal rx: std_logic;
  signal s_tick: std_logic;
  signal rx_done_tick: std_logic;
  signal dout: std_logic_vector( 7 downto 0) ;

  constant clock_period: time := 10 ns;
  signal stop_the_clock: boolean;

begin

  -- Insert values for generic parameters !!
  uut: uart_rx generic map ( DBIT         =>8 ;
                             SB_TICK      => 16 );
                  port map ( clk          => clk;
                             reset        => reset;
                             rx           => rx;
                             s_tick       => s_tick;
                             rx_done_tick => rx_done_tick;
                             dout         => dout );

  stimulus: process
  begin
  
    -- Put initialisation code here

    reset <= '1';
    wait for 5 ns;
    reset <= '0';
    wait for 5 ns;

    -- Put test bench stimulus code here

    stop_the_clock <= true;
    wait;
  end process;

  clocking: process
  begin
    while not stop_the_clock loop
      clk <= '0', '1' after clock_period / 2;
      wait for clock_period;
    end loop;
    wait;
  end process;

end;
  
--Configuration Declaration

-- Test bench configuration created online at:
--    www.doulos.com/knowhow/perl/testbench_creation/
-- Copyright Doulos Ltd
-- SD, 03 November 2002

configuration cfg_uart_rx_tb of uart_rx_tb is
  for bench
    for uut: uart_rx
      -- Default configuration
    end for;
  end for;
end cfg_uart_rx_tb;

configuration cfg_uart_rx_tb_arch of uart_rx_tb is
  for bench
    for uut: uart_rx
      use entity work.uart_rx(arch);
    end for;
  end for;
end cfg_uart_rx_tb_arch;