📄 avrcam.lss
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AVRcam.elf: file format elf32-avr
Sections:
Idx Name Size VMA LMA File off Algn
0 .noinit 00000030 00800300 00800300 00001162 2**0
ALLOC
1 .bss 00000274 00800070 00800070 00001162 2**0
ALLOC
2 .data 00000010 00800060 0000109e 00001152 2**0
CONTENTS, ALLOC, LOAD, DATA
3 .text 0000109e 00000000 00000000 000000b4 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE
4 .eeprom 00000000 00810000 00810000 00001162 2**0
CONTENTS
5 .stab 00003f30 00000000 00000000 00001164 2**2
CONTENTS, READONLY, DEBUGGING
6 .stabstr 0000181e 00000000 00000000 00005094 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
00000000 <__vectors>:
0: 63 c0 rjmp .+198 ; 0xc8
2: ea c7 rjmp .+4052 ; 0xfd8
4: ea c7 rjmp .+4052 ; 0xfda
6: 7a c0 rjmp .+244 ; 0xfc
8: 79 c0 rjmp .+242 ; 0xfc
a: 78 c0 rjmp .+240 ; 0xfc
c: 77 c0 rjmp .+238 ; 0xfc
e: 76 c0 rjmp .+236 ; 0xfc
10: e5 c7 rjmp .+4042 ; 0xfdc
12: 74 c0 rjmp .+232 ; 0xfc
14: 73 c0 rjmp .+230 ; 0xfc
16: a8 c5 rjmp .+2896 ; 0xb68
18: 71 c0 rjmp .+226 ; 0xfc
1a: 70 c0 rjmp .+224 ; 0xfc
1c: 6f c0 rjmp .+222 ; 0xfc
1e: 6e c0 rjmp .+220 ; 0xfc
20: 6d c0 rjmp .+218 ; 0xfc
22: 13 c6 rjmp .+3110 ; 0xc4a
24: 6b c0 rjmp .+214 ; 0xfc
00000026 <__ctors_end>:
26: 2a c6 rjmp .+3156 ; 0xc7c
28: 93 c6 rjmp .+3366 ; 0xd50
2a: 92 c6 rjmp .+3364 ; 0xd50
2c: 91 c6 rjmp .+3362 ; 0xd50
2e: 90 c6 rjmp .+3360 ; 0xd50
30: 8f c6 rjmp .+3358 ; 0xd50
32: 8e c6 rjmp .+3356 ; 0xd50
34: 8d c6 rjmp .+3354 ; 0xd50
36: 22 c6 rjmp .+3140 ; 0xc7c
38: 8b c6 rjmp .+3350 ; 0xd50
3a: 8a c6 rjmp .+3348 ; 0xd50
3c: 89 c6 rjmp .+3346 ; 0xd50
3e: 88 c6 rjmp .+3344 ; 0xd50
40: 87 c6 rjmp .+3342 ; 0xd50
42: 86 c6 rjmp .+3340 ; 0xd50
44: 85 c6 rjmp .+3338 ; 0xd50
46: 2a c6 rjmp .+3156 ; 0xc9c
48: 83 c6 rjmp .+3334 ; 0xd50
4a: 82 c6 rjmp .+3332 ; 0xd50
4c: 81 c6 rjmp .+3330 ; 0xd50
4e: 80 c6 rjmp .+3328 ; 0xd50
50: 7f c6 rjmp .+3326 ; 0xd50
52: 7e c6 rjmp .+3324 ; 0xd50
54: 7d c6 rjmp .+3322 ; 0xd50
56: 25 c6 rjmp .+3146 ; 0xca2
58: 7b c6 rjmp .+3318 ; 0xd50
5a: 7a c6 rjmp .+3316 ; 0xd50
5c: 79 c6 rjmp .+3314 ; 0xd50
5e: 78 c6 rjmp .+3312 ; 0xd50
60: 77 c6 rjmp .+3310 ; 0xd50
62: 76 c6 rjmp .+3308 ; 0xd50
64: 75 c6 rjmp .+3306 ; 0xd50
66: 25 c6 rjmp .+3146 ; 0xcb2
68: 73 c6 rjmp .+3302 ; 0xd50
6a: 72 c6 rjmp .+3300 ; 0xd50
6c: 71 c6 rjmp .+3298 ; 0xd50
6e: 70 c6 rjmp .+3296 ; 0xd50
70: 6f c6 rjmp .+3294 ; 0xd50
72: 6e c6 rjmp .+3292 ; 0xd50
74: 6d c6 rjmp .+3290 ; 0xd50
76: 64 c6 rjmp .+3272 ; 0xd40
78: 6b c6 rjmp .+3286 ; 0xd50
7a: 6a c6 rjmp .+3284 ; 0xd50
7c: 69 c6 rjmp .+3282 ; 0xd50
7e: 68 c6 rjmp .+3280 ; 0xd50
80: 67 c6 rjmp .+3278 ; 0xd50
82: 66 c6 rjmp .+3276 ; 0xd50
84: 65 c6 rjmp .+3274 ; 0xd50
86: 64 c6 rjmp .+3272 ; 0xd50
88: 63 c6 rjmp .+3270 ; 0xd50
8a: 62 c6 rjmp .+3268 ; 0xd50
8c: 61 c6 rjmp .+3266 ; 0xd50
8e: 60 c6 rjmp .+3264 ; 0xd50
90: 5f c6 rjmp .+3262 ; 0xd50
92: 5e c6 rjmp .+3260 ; 0xd50
94: 5d c6 rjmp .+3258 ; 0xd50
96: 23 c6 rjmp .+3142 ; 0xcde
98: 5b c6 rjmp .+3254 ; 0xd50
9a: 5a c6 rjmp .+3252 ; 0xd50
9c: 59 c6 rjmp .+3250 ; 0xd50
9e: 58 c6 rjmp .+3248 ; 0xd50
a0: 57 c6 rjmp .+3246 ; 0xd50
a2: 56 c6 rjmp .+3244 ; 0xd50
a4: 55 c6 rjmp .+3242 ; 0xd50
a6: fd c5 rjmp .+3066 ; 0xca2
a8: 53 c6 rjmp .+3238 ; 0xd50
aa: 52 c6 rjmp .+3236 ; 0xd50
ac: 51 c6 rjmp .+3234 ; 0xd50
ae: 50 c6 rjmp .+3232 ; 0xd50
b0: 4f c6 rjmp .+3230 ; 0xd50
b2: 4e c6 rjmp .+3228 ; 0xd50
b4: 4d c6 rjmp .+3226 ; 0xd50
b6: 1f c6 rjmp .+3134 ; 0xcf6
b8: 4b c6 rjmp .+3222 ; 0xd50
ba: 4a c6 rjmp .+3220 ; 0xd50
bc: 49 c6 rjmp .+3218 ; 0xd50
be: 48 c6 rjmp .+3216 ; 0xd50
c0: 47 c6 rjmp .+3214 ; 0xd50
c2: 46 c6 rjmp .+3212 ; 0xd50
c4: 45 c6 rjmp .+3210 ; 0xd50
c6: 36 c6 rjmp .+3180 ; 0xd34
000000c8 <__init>:
c8: 11 24 eor r1, r1
ca: 1f be out 0x3f, r1 ; 63
cc: cf e5 ldi r28, 0x5F ; 95
ce: d4 e0 ldi r29, 0x04 ; 4
d0: de bf out 0x3e, r29 ; 62
d2: cd bf out 0x3d, r28 ; 61
000000d4 <__do_copy_data>:
d4: 10 e0 ldi r17, 0x00 ; 0
d6: a0 e6 ldi r26, 0x60 ; 96
d8: b0 e0 ldi r27, 0x00 ; 0
da: ee e9 ldi r30, 0x9E ; 158
dc: f0 e1 ldi r31, 0x10 ; 16
de: 02 c0 rjmp .+4 ; 0xe4
000000e0 <.do_copy_data_loop>:
e0: 05 90 lpm r0, Z+
e2: 0d 92 st X+, r0
000000e4 <.do_copy_data_start>:
e4: a0 37 cpi r26, 0x70 ; 112
e6: b1 07 cpc r27, r17
e8: d9 f7 brne .-10 ; 0xe0
000000ea <__do_clear_bss>:
ea: 12 e0 ldi r17, 0x02 ; 2
ec: a0 e7 ldi r26, 0x70 ; 112
ee: b0 e0 ldi r27, 0x00 ; 0
f0: 01 c0 rjmp .+2 ; 0xf4
000000f2 <.do_clear_bss_loop>:
f2: 1d 92 st X+, r1
000000f4 <.do_clear_bss_start>:
f4: a4 3e cpi r26, 0xE4 ; 228
f6: b1 07 cpc r27, r17
f8: e1 f7 brne .-8 ; 0xf2
fa: 31 c0 rjmp .+98 ; 0x15e
000000fc <__bad_interrupt>:
fc: 76 c7 rjmp .+3820 ; 0xfea
000000fe <CamInt_init>:
#endif
/* set up the mega8 ports that will be interfacing
with the camera */
CAM_CONTROL_PORT_DIR |= (1<<CAM_RESET_LINE); /* cam reset is output */
fe: 8f 9a sbi 0x11, 7 ; 17
CAM_CONTROL_PORT_DIR |= 0x80; /* set just the MSB as an output */
100: 8f 9a sbi 0x11, 7 ; 17
CAM_CONTROL_PORT_DIR &= 0xFB; /* make sure bit2 is clear (input) */
102: 8a 98 cbi 0x11, 2 ; 17
CAM_CONTROL_PORT &= 0x7F; /* set reset line low */
104: 97 98 cbi 0x12, 7 ; 18
CAM_G_BUS_DIR &= 0xF0; /* 4-bit G bus all inputs */
106: 90 ef ldi r25, 0xF0 ; 240
108: 87 b3 in r24, 0x17 ; 23
10a: 89 23 and r24, r25
10c: 87 bb out 0x17, r24 ; 23
CAM_G_BUS_DIR |= 0xF0; /* disable the pull-up on PB4 and PB5 */
10e: 87 b3 in r24, 0x17 ; 23
110: 89 2b or r24, r25
112: 87 bb out 0x17, r24 ; 23
CAM_RB_BUS_DIR &= 0xF0; /* 4-bit RB bus all inputs */
114: 84 b3 in r24, 0x14 ; 20
116: 89 23 and r24, r25
118: 84 bb out 0x14, r24 ; 20
/* ensure that timer1 is disabled to start...eventually, when PCLK needs
to feed timer1 through the external counter, it will be enabled on an
"as needed" basis...*/
TCCR1B &= ~( (1<<CS12)|(1<<CS11)|(1<<CS10) );
11a: 8e b5 in r24, 0x2e ; 46
11c: 88 7f andi r24, 0xF8 ; 248
11e: 8e bd out 0x2e, r24 ; 46
/* we'll turn on the interrupt after we assign the initial TCNT value */
/* set up External Interrupt1 to interrupt us on rising edges (HREF)...
this is needed to indicate when the first pixel of each line is about to start, so
we can synch up with it...this interrupt will be disabled once HREF goes high */
MCUCR |= (1<<ISC11) | (1<<ISC10); /* rising edge interrupt */
120: 85 b7 in r24, 0x35 ; 53
122: 8c 60 ori r24, 0x0C ; 12
124: 85 bf out 0x35, r24 ; 53
/* the interrupt will be enabled when we are ready to detect the rising edge of
HREF...its now primed and ready to go */
/* set up External Interrupt0 to interrupt us on rising edges (VSYNC) */
MCUCR |= (1<<ISC01) | (1<<ISC00); /* rising edge interrupt */
126: 85 b7 in r24, 0x35 ; 53
128: 83 60 ori r24, 0x03 ; 3
12a: 85 bf out 0x35, r24 ; 53
GICR |= (1<<INT0); /* interrupt request enabled */
12c: 8b b7 in r24, 0x3b ; 59
12e: 80 64 ori r24, 0x40 ; 64
130: 8b bf out 0x3b, r24 ; 59
/* set up TimerO to count and be clocked from an external pulse source
(HREF) on falling edges...eventually, we need to enable the interrupt
for this! FIX THIS */
TCCR0 = (1<<CS02)|(1<<CS01)|(0<<CS00);
132: 86 e0 ldi r24, 0x06 ; 6
134: 83 bf out 0x33, r24 ; 51
/* setting up the PCLK counter with Timer1 will be done right after
we start receiving pixels in each line...we sacrifice the first pixel
in each line, but we'll account for it...*/
/* set up the mega8 so that its sleep mode puts it in an IDLE sleep
mode, where it can wake up as fast as possible */
set_sleep_mode(SLEEP_MODE_IDLE);
136: 85 b7 in r24, 0x35 ; 53
138: 8f 78 andi r24, 0x8F ; 143
13a: 85 bf out 0x35, r24 ; 53
/* umm....we need to actually enable the sleep mode...*/
MCUCR |= 0x80;
13c: 85 b7 in r24, 0x35 ; 53
13e: 80 68 ori r24, 0x80 ; 128
140: 85 bf out 0x35, r24 ; 53
/* initialize the memLookup table */
memset(colorMap,0x00,NUM_ELEMENTS_IN_COLOR_MAP);
142: 80 e0 ldi r24, 0x00 ; 0
144: 93 e0 ldi r25, 0x03 ; 3
146: 20 e3 ldi r18, 0x30 ; 48
148: fc 01 movw r30, r24
14a: 11 92 st Z+, r1
14c: 2a 95 dec r18
14e: e9 f7 brne .-6 ; 0x14a
/* read the color map out of EEPROM */
eeprom_read_block(colorMap, (unsigned char*)0x01,NUM_ELEMENTS_IN_COLOR_MAP);
150: 40 e3 ldi r20, 0x30 ; 48
152: 50 e0 ldi r21, 0x00 ; 0
154: 61 e0 ldi r22, 0x01 ; 1
156: 70 e0 ldi r23, 0x00 ; 0
158: 7d d7 rcall .+3834 ; 0x1054
#if OUTPUT_INITIAL_COLOR_MAP
UIMgr_txBuffer("\r\n",2);
for (i=0; i<NUM_ELEMENTS_IN_COLOR_MAP; i++)
{
memset(asciiBuffer,0x00,5);
itoa(colorMap[i],asciiBuffer,10);
UIMgr_txBuffer(asciiBuffer,3);
UIMgr_txBuffer(" ",1);
if (i==15 || i == 31)
{
/* break up the output */
UIMgr_txBuffer("\r\n",2);
}
}
#endif
#ifndef NO_CRYSTAL
CamInt_resetCam();
#endif
}
15a: 08 95 ret
0000015c <CamInt_resetCam>:
/***********************************************************
Function Name: CamInt_resetCam
Function Description: This function is responsible
for resetting the camera. This is accomplished by
toggling the reset line on the OV6620 for ~100 mS.
Inputs: none
Outputs: none
IMPORTANT NOTE: This function has effectively been removed
since resetting the camera now causes the camera to not
output the clock signal. Thus, if we reset the cam, the
AVR has no clock, and thus doesn't run...
***********************************************************/
void CamInt_resetCam(void)
{
15c: 08 95 ret
0000015e <main>:
Inputs: none
Outputs: int
***********************************************************/
int main(void)
{
15e: cf e5 ldi r28, 0x5F ; 95
160: d4 e0 ldi r29, 0x04 ; 4
162: de bf out 0x3e, r29 ; 62
164: cd bf out 0x3d, r28 ; 61
/* initialize all of the interface modules */
DebugInt_init();
166: aa d6 rcall .+3412 ; 0xebc
UartInt_init();
168: f1 d4 rcall .+2530 ; 0xb4c
I2CInt_init();
16a: 2c d5 rcall .+2648 ; 0xbc4
CamInt_init();
16c: c8 df rcall .-112 ; 0xfe
/* initialize the remaining modules that will process
data...interrupts need to be on for these */
ENABLE_INTS();
16e: 78 94 sei
CamConfig_init();
170: fa d5 rcall .+3060 ; 0xd66
UIMgr_init();
172: 94 d2 rcall .+1320 ; 0x69c
FrameMgr_init();
174: 7f d0 rcall .+254 ; 0x274
/* provide a short delay for the camera to stabilize before
we let the executive start up */
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