📄 caminterfaceasm.lst
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72 <tt>__SFR_OFFSET</tt> definition is no longer necessary and can be removed.
73
74 Real example - this code could be used in a boot loader that is portable
75 between devices with \c SPMCR at different addresses.
76
77 \verbatim
78 <avr/iom163.h>: #define SPMCR _SFR_IO8(0x37)
79 <avr/iom128.h>: #define SPMCR _SFR_MEM8(0x68)
80 \endverbatim
81
82 \code
82
83 /*
84 * Registers common to all AVR devices.
85 */
86
87 #if __AVR_ARCH__ != 1
88 /*
89 * AVR architecture 1 has no RAM, thus no stack pointer.
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90 *
91 * All other archs do have a stack pointer. Some devices have only
92 * less than 256 bytes of possible RAM locations (128 Bytes of SRAM
93 * and no option for external RAM), thus SPH is officially "reserved"
94 * for them. We catch this case below after including the
95 * device-specific ioXXXX.h file, by examining XRAMEND, and
96 * #undef-ining SP and SPH in that case.
97 */
98 /* Stack Pointer */
99 #define SP _SFR_IO16(0x3D)
100 #define SPL _SFR_IO8(0x3D)
101 #define SPH _SFR_IO8(0x3E)
102 #endif /* #if __AVR_ARCH__ != 1 */
103
104 /* Status REGister */
105 #define SREG _SFR_IO8(0x3F)
106
107 /* Status Register - SREG */
108 #define SREG_I 7
109 #define SREG_T 6
110 #define SREG_H 5
111 #define SREG_S 4
112 #define SREG_V 3
113 #define SREG_N 2
114 #define SREG_Z 1
115 #define SREG_C 0
116
117 /* Pointer definition */
118 #if __AVR_ARCH__ != 1
119 /* avr1 has only the Z pointer */
120 #define XL r26
121 #define XH r27
122 #define YL r28
123 #define YH r29
124 #endif /* #if __AVR_ARCH__ != 1 */
125 #define ZL r30
126 #define ZH r31
127
128 /*
129 * Only few devices come without EEPROM. In order to assemble the
130 * EEPROM library components without defining a specific device, we
131 * keep the EEPROM-related definitions here, and catch the devices
132 * without EEPROM (E2END == 0) below. Obviously, the EEPROM library
133 * functions will not work for them. ;-)
134 */
135 /* EEPROM Control Register */
136 #define EECR _SFR_IO8(0x1C)
137
138 /* EEPROM Data Register */
139 #define EEDR _SFR_IO8(0x1D)
140
141 /* EEPROM Address Register */
142 #define EEAR _SFR_IO16(0x1E)
143 #define EEARL _SFR_IO8(0x1E)
144 #define EEARH _SFR_IO8(0x1F)
145
146 /* EEPROM Control Register */
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147 #define EERIE 3
148 #define EEMWE 2
149 #define EEWE 1
150 #define EERE 0
151
152 #if defined (__AVR_AT94K__)
153 # include <avr/ioat94k.h>
154 #elif defined (__AVR_AT43USB320__)
155 # include <avr/io43u32x.h>
156 #elif defined (__AVR_AT43USB355__)
157 # include <avr/io43u35x.h>
158 #elif defined (__AVR_AT76C711__)
159 # include <avr/io76c711.h>
160 #elif defined (__AVR_AT86RF401__)
161 # include <avr/io86r401.h>
162 #elif defined (__AVR_ATmega128__)
163 # include <avr/iom128.h>
164 #elif defined (__AVR_ATmega64__)
165 # include <avr/iom64.h>
166 #elif defined (__AVR_ATmega103__)
167 # include <avr/iom103.h>
168 #elif defined (__AVR_ATmega32__)
169 # include <avr/iom32.h>
170 #elif defined (__AVR_ATmega323__)
171 # include <avr/iom323.h>
172 #elif defined (__AVR_ATmega16__)
173 # include <avr/iom16.h>
174 #elif defined (__AVR_ATmega161__)
175 # include <avr/iom161.h>
176 #elif defined (__AVR_ATmega162__)
177 # include <avr/iom162.h>
178 #elif defined (__AVR_ATmega163__)
179 # include <avr/iom163.h>
180 #elif defined (__AVR_ATmega169__)
181 # include <avr/iom169.h>
182 #elif defined (__AVR_ATmega8__)
183 # include <avr/iom8.h>
1 /* Copyright (c) 2002, Marek Michalkiewicz
2 All rights reserved.
3
4 Redistribution and use in source and binary forms, with or without
5 modification, are permitted provided that the following conditions are met:
6
7 * Redistributions of source code must retain the above copyright
8 notice, this list of conditions and the following disclaimer.
9 * Redistributions in binary form must reproduce the above copyright
10 notice, this list of conditions and the following disclaimer in
11 the documentation and/or other materials provided with the
12 distribution.
13
14 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
18 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
19 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
20 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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21 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
22 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
23 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
24 POSSIBILITY OF SUCH DAMAGE. */
25
26 /* $Id: iom8.h,v 1.8 2003/02/17 09:57:28 marekm Exp $ */
27
28 /* avr/iom8.h - definitions for ATmega8 */
29
30 #ifndef _AVR_IOM8_H_
31 #define _AVR_IOM8_H_ 1
32
33 /* This file should only be included from <avr/io.h>, never directly. */
34
35 #ifndef _AVR_IO_H_
36 # error "Include <avr/io.h> instead of this file."
37 #endif
38
39 #ifndef _AVR_IOXXX_H_
40 # define _AVR_IOXXX_H_ "iom8.h"
41 #else
42 # error "Attempt to include more than one <avr/ioXXX.h> file."
43 #endif
44
45 /* I/O registers */
46
47 /* TWI stands for "Two Wire Interface" or "TWI Was I2C(tm)" */
48 #define TWBR _SFR_IO8(0x00)
49 #define TWSR _SFR_IO8(0x01)
50 #define TWAR _SFR_IO8(0x02)
51 #define TWDR _SFR_IO8(0x03)
52
53 /* ADC */
54 #define ADCW _SFR_IO16(0x04)
55 #ifndef __ASSEMBLER__
56 #define ADC _SFR_IO16(0x04)
57 #endif
58 #define ADCL _SFR_IO8(0x04)
59 #define ADCH _SFR_IO8(0x05)
60 #define ADCSR _SFR_IO8(0x06)
61 #define ADCSRA _SFR_IO8(0x06) /* Changed in 2486H-AVR-09/02 */
62 #define ADMUX _SFR_IO8(0x07)
63
64 /* analog comparator */
65 #define ACSR _SFR_IO8(0x08)
66
67 /* USART */
68 #define UBRRL _SFR_IO8(0x09)
69 #define UCSRB _SFR_IO8(0x0A)
70 #define UCSRA _SFR_IO8(0x0B)
71 #define UDR _SFR_IO8(0x0C)
72
73 /* SPI */
74 #define SPCR _SFR_IO8(0x0D)
75 #define SPSR _SFR_IO8(0x0E)
76 #define SPDR _SFR_IO8(0x0F)
77
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78 /* Port D */
79 #define PIND _SFR_IO8(0x10)
80 #define DDRD _SFR_IO8(0x11)
81 #define PORTD _SFR_IO8(0x12)
82
83 /* Port C */
84 #define PINC _SFR_IO8(0x13)
85 #define DDRC _SFR_IO8(0x14)
86 #define PORTC _SFR_IO8(0x15)
87
88 /* Port B */
89 #define PINB _SFR_IO8(0x16)
90 #define DDRB _SFR_IO8(0x17)
91 #define PORTB _SFR_IO8(0x18)
92
93 /* 0x1C..0x1F EEPROM */
94
95 #define UCSRC _SFR_IO8(0x20)
96 #define UBRRH _SFR_IO8(0x20)
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