state.map.summary

来自「FPGA实验：用于检测输入的二进制系列」· SUMMARY 代码 · 共 13 行

Analysis & Synthesis Status : Successful - Sun Oct 26 15:35:07 2008
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Web Edition
Revision Name : state
Top-level Entity Name : state
Family : Cyclone II
Total logic elements : 42
Total registers : 22
Total pins : 21
Total virtual pins : 0
Total memory bits : 0
Embedded Multiplier 9-bit elements : 0
Total PLLs : 0