series_detection.cdf

FPGA实验：用于检测输入的二进制系列

/* Quartus II Version 6.0 Build 178 04/27/2006 SJ Web Edition */
JedecChain;
	FileRevision(JESD32A);
	DefaultMfr(6E);

	P ActionCode(Ign)
		Device PartName(EP2C35F672) MfrSpec(OpMask(0) FullPath("series_detection.sof"));

ChainEnd;

AlteraBegin;
	ChainType(JTAG);
AlteraEnd;