csp.h

IAR 平台ATMEL 的例程, 和说明

#define IBIT_CAN1       (0x01ul << 8)  /* CAN1 Interrupt                     */
#define IBIT_CAN2       (0x01ul << 9)  /* CAN2 Interrupt                     */
#define IBIT_ADC0       (0x01ul << 10) /* ADC0 Interrupt                     */
#define IBIT_ADC1       (0x01ul << 11) /* ADC1 Interrupt                     */
#define IBIT_GPT0CH0    (0x01ul << 12) /* GPT0CH0 Interrupt                  */
#define IBIT_GPT0CH1    (0x01ul << 13) /* GPT0CH1 Interrupt                  */
#define IBIT_GPT0CH2    (0x01ul << 14) /* GPT0CH2 Interrupt                  */
#define IBIT_GPT1CH0    (0x01ul << 15) /* GPT1CH0 Interrupt                  */
#define IBIT_PWM        (0x01ul << 16) /* PWM Interrupt                      */
#define IBIT_SWIRQ1     (0x01ul << 17) /* Software Interrupt 1               */
#define IBIT_SWIRQ2     (0x01ul << 18) /* Software Interrupt 2               */
#define IBIT_SWIRQ3     (0x01ul << 19) /* Software Interrupt 3               */
#define IBIT_CAN0       (0x01ul << 20) /* CAN0 Interrupt                     */
#define IBIT_UPIO       (0x01ul << 21) /* UPIO Interrupt                     */
#define IBIT_CAPT0      (0x01ul << 22) /* CAPT0 Interrupt                    */
#define IBIT_CAPT1      (0x01ul << 23) /* CAPT1 Interrupt                    */
#define IBIT_ST0        (0x01ul << 24) /* ST0 Interrupt                      */
#define IBIT_ST1        (0x01ul << 25) /* ST1 Interrupt                      */
#define IBIT_SWIRQ4     (0x01ul << 26) /* Software Interrupt 4               */
#define IBIT_SWIRQ5     (0x01ul << 27) /* Software Interrupt 5               */
#define IBIT_EXTIRQ0    (0x01ul << 28) /* External Interrupt 0               */
#define IBIT_EXTIRQ1    (0x01ul << 29) /* External Interrupt 1               */
#define IBIT_SWIRQ6     (0x01ul << 30) /* Software Interrupt 6               */
#define IBIT_SWIRQ7     (0x01ul << 31) /* Software Interrupt 7               */
#define ALL_IRQ         (0xFFFFFFFFul) /* All Interrupts                     */


/******************************************************************************
*********************** Peripherals Types Definition **************************
******************************************************************************/

/******************************************************************************
* Peripherals Type Enum
******************************************************************************/
typedef enum 
{
   UNUSED = -1, WATCHDOG_E, WATCHTIMER_E, USART_E, SPI_E, CAN16C_E, CAN32C_E, 
   ADC8C_10_E, GPT3C_E, GPT1C_E, PWM4C_E, CAPTURE_E, SIMPLETIMER_E, PIO_E
} CSP_PERIPHERAL_TYPE_E;

/******************************************************************************
* Peripherals Type Structure
******************************************************************************/
typedef struct
{ 
   CSP_PERIPHERAL_TYPE_E  Type;                 /* Type Of Peripheral        */
   U8_T                   InterruptNumber;      /* Interrupt Number          */
   U8_T                   PdcRx;                /* PDC Channel Rx            */
   U8_T                   PdcTx;                /* PDC Channel Tx            */
} CSP_PERIPHERAL_TYPE_T;


/******************************************************************************
*********************** Peripherals Macros Definition *************************
******************************************************************************/
/* Get Peripheral Psel Number (See CHIP Tab in CSP.C file)                   */
#define CSP_GET_PSEL_NUMBER(periph)       (((U32_T)(periph) - 0xFFFA0000ul) / 0x4000ul)

/* Get Peripheral Interrupt Number (See CHIP Tab in CSP.C file)              */ 
#define CSP_GET_INTERRUPT_NUMBER(periph)  (CHIP[CSP_GET_PSEL_NUMBER(periph)].InterruptNumber)

/* Get Peripheral PDC Number (See CHIP Tab in CSP.C file)                    */
#define CSP_GET_PDC_RX_NUMBER(periph)     (CHIP[CSP_GET_PSEL_NUMBER(periph)].PdcRx)
#define CSP_GET_PDC_TX_NUMBER(periph)     (CHIP[CSP_GET_PSEL_NUMBER(periph)].PdcTx)

/* Get Peripheral Type (See CHIP Tab in CSP.C file)                          */
#define CSP_GET_PERIPHERAL_TYPE(periph)   (CHIP[CSP_GET_PSEL_NUMBER(periph)].Type)


/******************************************************************************
********************* External Peripheral Declaration *************************
******************************************************************************/
/* System Peripherals                                                        */
extern CSP_AMC_T     *const AMC;
extern CSP_SFM_T     *const SFM;
extern CSP_WD_T      *const WD;
extern CSP_WT_T      *const WT;
extern CSP_USART_T   *const USART0;
extern CSP_USART_T   *const USART1;
extern CSP_CAN_T     *const CAN3;
extern CSP_SPI_T     *const SPI0;
extern CSP_CAN_T     *const CAN1;
extern CSP_CAN_T     *const CAN2;
extern CSP_ADC8C_T   *const ADC0;
extern CSP_ADC8C_T   *const ADC1;
extern CSP_GPT3C_T   *const GPT0;
extern CSP_GPT_T     *const GPT0CH0;
extern CSP_GPT_T     *const GPT0CH1;
extern CSP_GPT_T     *const GPT0CH2;
extern CSP_GPT1C_T   *const GPT1;
extern CSP_GPT_T     *const GPT1CH0;
extern CSP_PWM4C_T   *const PWM0;
extern CSP_CAN_T     *const CAN0;
extern CSP_PIO_T     *const UPIO;
extern CSP_CAPT_T    *const CAPT0;
extern CSP_CAPT_T    *const CAPT1;
extern CSP_ST_T      *const ST0;
extern CSP_ST_T      *const ST1;
extern CSP_CM_T      *const CM;
extern CSP_PMC_T     *const PMC;
extern CSP_PDC_T     *const PDC;
extern CSP_GIC_T     *const GIC;

/* Ghost System Peripherals                                                        */
extern CSP_AMC_T     *const AMC_GHOST;
extern CSP_SFM_T     *const SFM_GHOST;
extern CSP_WD_T      *const WD_GHOST;
extern CSP_WT_T      *const WT_GHOST;
extern CSP_USART_T   *const USART0_GHOST;
extern CSP_USART_T   *const USART1_GHOST;
extern CSP_CAN_T     *const CAN3_GHOST;
extern CSP_SPI_T     *const SPI0_GHOST;
extern CSP_CAN_T     *const CAN1_GHOST;
extern CSP_CAN_T     *const CAN2_GHOST;
extern CSP_ADC8C_T   *const ADC0_GHOST;
extern CSP_ADC8C_T   *const ADC1_GHOST;
extern CSP_GPT3C_T   *const GPT0_GHOST;
extern CSP_GPT_T     *const GPT0CH0_GHOST;
extern CSP_GPT_T     *const GPT0CH1_GHOST;
extern CSP_GPT_T     *const GPT0CH2_GHOST;
extern CSP_GPT1C_T   *const GPT1_GHOST;
extern CSP_GPT_T     *const GPT1CH0_GHOST;
extern CSP_PWM4C_T   *const PWM_GHOST;
extern CSP_CAN_T     *const CAN0_GHOST;
extern CSP_PIO_T     *const UPIO_GHOST;
extern CSP_CAPT_T    *const CAPT0_GHOST;
extern CSP_CAPT_T    *const CAPT1_GHOST;
extern CSP_ST_T      *const ST0_GHOST;
extern CSP_ST_T      *const ST1_GHOST;
extern CSP_CM_T      *const CM_GHOST;
extern CSP_PMC_T     *const PMC_GHOST;
extern CSP_PDC_T     *const PDC_GHOST;
extern CSP_GIC_T     *const GIC_GHOST;

/* Chip                                                                      */
extern const CSP_PERIPHERAL_TYPE_T CHIP[PERIPH_NUMBER];

#endif   /* CSP_H */