readme.txt

IAR 开发环境的Cirrus Logic的例程

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#                             edb9312.eww
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#                                                   $Revision: 1.3 $
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DESCRIPTION
===========
This example project shows how to use the IAR Embedded Workbench for ARM
to develop code for the Cirrus Logic EDB9312 evaluation board.
It shows basic use of parallel I/O, timer and the interrupt
controller.

The example only sets up a subset of the I/O registers.
Low level setup like memory configuration must be done prior to the start
of this program. The low level setup done by the flash boot program is
good enough. Make sure that the JTAG interface does not perform a hard
reset at startup as this will destroy the initialization done by the flash
boot code. The MMU and I/D caches are enabled by the boot program.

The example will toggle the red LED1 and green LED2 next to the CPU
socket (on the JTAG connector side).

COMPATIBILITY
=============
The project is compatible with the Cirrus Logic EDB9312 evaluation board.
The project is by default configured to use the Abatron BDI1000 JTAG interface.

CONFIGURATION
=============
Configure the Abatron BDI1000 interface for ARM920T and set the workspace area at 0x70000.

Connect the JTAG cable and power up the system.

Start the IAR Embedded Workbench for ARM.
Select File->Open->Workspace...
Open the workspace file
...\IAR Systems\Embedded Workbench 4.0\ARM\src\examples\cirrus\edb9312\edb9312.eww

Load the Abatron RDI driver:
Select Project->Options...
In the category field select C-SPY.
In the setup tab set driver to RDI.
Select the RDI tab.
Browse to the BDIRDI.DLL driver file.
Close the options dialog.

Press the Go button.


The project uses a modified version of cstartup (edb9312_cstartup.s79).
The only difference from the standard cstartup is the addition of the IRQ
exception vector irq_handler.

The linker configuration file is edb9312.xcl.
Vectors are located at 0x00-0x3F in RAM.
Code is located at 0x00000100-0x0000FFFF in RAM.
Data is located at 0x00010000-0x0007FFFF in RAM.